inria-00429617, version 1
Exact and Approximated error of the FMA
Sylvie Boldo
1, 2Jean-Michel Muller
3, 4
IEEE Transactions on Computers 60, 2 (2011) 157-164
Abstract: The fused multiply accumulate-add (FMA) instruction, specified by the IEEE 754-2008 Standard for Floating-Point Arithmetic, eases some calculations, and is already available on some current processors such as the Power PC or the Itanium. We first extend an earlier work on the computation of the exact error of an FMA (by giving more general conditions and providing a formal proof). Then, we present a new algorithm that computes an approximation to the error of an FMA, and provide error bounds and a formal proof for that algorithm.
- 1: PROVAL (INRIA Saclay - Ile de France)
- INRIA – Université Paris XI - Paris Sud – CNRS : UMR
- 2: Laboratoire de Recherche en Informatique (LRI)
- CNRS : UMR8623 – Université Paris XI - Paris Sud
- 3: Laboratoire de l'Informatique du Parallélisme (LIP)
- Université de Lyon – CNRS : UMR5668 – INRIA – École Normale Supérieure - Lyon – Université Claude Bernard - Lyon I
- 4: ARENAIRE (Inria Grenoble Rhône-Alpes / LIP Laboratoire de l'Informatique du Parallélisme)
- INRIA – CNRS : UMR5668 – Université Claude Bernard - Lyon I – École Normale Supérieure - Lyon
- Domain : Computer Science/Logic in Computer Science
Computer Science/Numerical Analysis
- inria-00429617, version 1
- http://hal.inria.fr/inria-00429617
- oai:hal.inria.fr:inria-00429617
- From: Sylvie Boldo
- Submitted on: Tuesday, 3 November 2009 16:45:02
- Updated on: Monday, 12 December 2011 11:17:54






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