inria-00441472, version 2
Structuring the execution of OpenMP applications for multicore architectures
François Broquedis
a, 1, 2Olivier Aumage
1, 2Brice Goglin
1, 2Samuel Thibault
1, 2Pierre-André Wacrenier 1, 2Raymond Namyst 1, 2
International Parallel and Distributed Symposium (IPDPS 2010) (2010)
Résumé : The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user friendliness of shared memory on the one side, and memory access scalability and efficiency on the other side. However, to get high performance out of such machines requires a dynamic mapping of application tasks and data onto the underlying architecture. Moreover, depending on the application behavior, this mapping should favor cache affinity, memory bandwidth, computation synchrony, or a combination of these. The great challenge is then to perform this hardware-dependent mapping in a portable, abstract way. To meet this need, we propose a new, hierarchical approach to the execution of OpenMP threads onto multicore machines. Our ForestGOMP runtime system dynamically generates structured trees out of OpenMP programs. It collects relationship information about threads and data as well. This information is used together with scheduling hints and hardware counter feedback by the scheduler to select the most appropriate threads and data distribution. ForestGOMP features a high-level platform for developing and tuning portable threads schedulers. We present several applications for which we developed specific scheduling policies that achieve excellent speedups on 16-core machines.
- a – Université Sciences et Technologies - Bordeaux I
- 1 : Laboratoire Bordelais de Recherche en Informatique (LaBRI)
- CNRS : UMR5800 – Université Sciences et Technologies - Bordeaux I – Ecole Nationale Supérieure d'Electronique, Informatique et Radiocommunications de Bordeaux – Université Victor Segalen - Bordeaux II
- 2 : RUNTIME (INRIA Bordeaux - Sud-Ouest)
- INRIA – CNRS : UMR5800 – Université Sciences et Technologies - Bordeaux I – Ecole Nationale Supérieure d'Electronique, Informatique et Radiocommunications de Bordeaux
- Domaine : Informatique/Système d'exploitation
- Versions disponibles : v1 (18-12-2009) v2 (29-01-2010)
- inria-00441472, version 2
- http://hal.inria.fr/inria-00441472
- oai:hal.inria.fr:inria-00441472
- Contributeur : Brice Goglin
- Soumis le : Vendredi 29 Janvier 2010, 15:29:08
- Dernière modification le : Lundi 14 Juin 2010, 08:24:16






Documents associés
Exporter