inria-00560707, version 2
Energy-aware mappings of series-parallel workflows onto chip multiprocessors
Anne Benoit
a, 1, 2Rami Melhem
3Paul Renaud-Goud
a, 1, 2Yves Robert
a, 1, 2
N° RR-7521 (2011)
Résumé : This paper studies the problem of mapping streaming appli- cations that can be modeled by a series-parallel graph, onto a 2-dimensional tiled CMP architecture. The objective of the mapping is to minimize the energy consumption, using dynamic and voltage scaling techniques, while maintaining a given level of performance, reflected by the rate of process- ing the data streams. This mapping problem turns out to be NP-hard, but we identify simpler instances, whose optimal solution can be computed by a dynamic programming algo- rithm in polynomial time. Several heuristics are proposed to tackle the general problem, building upon the theoretical results. Finally, we assess the performance of the heuris- tics through comprehensive simulations using the StreamIt workflow suite and various CMP grid sizes.
- a – École Normale Supérieure de Lyon
- 1 : GRAAL (INRIA Grenoble Rhône-Alpes / LIP Laboratoire de l'Informatique du Parallélisme)
- CNRS : UMR5668 – INRIA – École Normale Supérieure - Lyon – Université Claude Bernard - Lyon I – Laboratoire d'informatique du Parallélisme
- 2 : Laboratoire de l'Informatique du Parallélisme (LIP)
- Université de Lyon – CNRS : UMR5668 – INRIA – École Normale Supérieure - Lyon – Université Claude Bernard - Lyon I
- 3 : Department of Computer Science - University of Pittsburgh
- University of Pittsburgh
- Domaine : Informatique/Calcul parallèle, distribué et partagé
- Référence interne : RR-7521
- Versions disponibles : v1 (29-01-2011) v2 (04-04-2011)
- inria-00560707, version 2
- http://hal.inria.fr/inria-00560707
- oai:hal.inria.fr:inria-00560707
- Contributeur : Anne Benoit
- Soumis le : Lundi 4 Avril 2011, 14:10:28
- Dernière modification le : Mardi 5 Avril 2011, 10:41:53






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