hal-00014976, version 1
A way to build efficient carry-skip adders
IEEE Transactions on Computers Oct. ; C-36(10) (1987) 1144-52
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CNRS : UMR5159 – Université Joseph Fourier - Grenoble I – Institut National Polytechnique de Grenoble (INPG) 46 Av Félix Viallet 38031 GRENOBLE CEDEX 1 France - 2:
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Ecole d'Ingénieurs de l'Etat de Vaud Rte de Cheseaux 1 CH-1400 Yverdon Switzerland - 3:
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Bibliographic reference
- Type of document: Articles in peer-reviewed journal
- Subject: Engineering Sciences/Micro and nanotechnologies/Microelectronics
- Title: A way to build efficient carry-skip adders
- Abstract: A way is presented to obtain efficient carry-skip adders, built with blocks of different sizes in VLSI technologies. Some results for two-level carry-skip adders are given, and the optimization problem is reduced to a geometrical problem that is solved by means of an algorithm easily implemented on a microcomputer. An example of the realization of such an adder is presented.
- Fulltext language: English
- Journal:
IEEE Transactions on Computers Publisher Institute of Electrical and Electronics Engineers (IEEE) ISSN 0018-9340 - Audience: international
- Publication date: 1987
- Volume: Oct. ; C-36(10)
- Page, identifiant, ...: 1144-52
- Keyword(s): carry-skip-adders – VLSI-technologies – optimization-problem – geometrical-problem
- Classification: PACS 85.42
- hal-00014976, version 1
- http://hal.archives-ouvertes.fr/hal-00014976
- oai:hal.archives-ouvertes.fr:hal-00014976
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- Submitted on: Thursday, 1 December 2005 11:42:45
- Updated on: Friday, 25 September 2009 14:29:42



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