A Multi-Level Design Methodology of Multistage Interconnection Network for MPSOCs

Yassine Aydi; Mouna Baklouti; Jean-Luc Dekeyser; Mohamed Abid

inria-00563733, version 1

A Multi-Level Design Methodology of Multistage Interconnection Network for MPSOCs

Yassine Aydi ¹, Mouna Baklouti ¹, Jean-Luc Dekeyser ², Mohamed Abid ¹

International Journal of Computer Applications in Technology (IJCAT) 42, 1-2 (2011)

1: Ecole Nationale d'Ingénieurs de Sfax / National Engineering School of Sfax (ENIS)
[ENIS] École Nationale d'Ingénieurs de Sfax, Tunisie
2: DART (INRIA Lille - Nord Europe)
INRIA – CNRS : UMR8022 – Université Lille I - Sciences et technologies

inria-00563733, version 1
http://hal.inria.fr/inria-00563733
oai:hal.inria.fr:inria-00563733
From: Mister Dart <>
Submitted on: Monday, 7 February 2011 11:21:05
Updated on: Monday, 7 February 2011 11:21:05

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