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ADAC

 ADAptive Computing

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Computing Architectures multiprocesseurs Activity sensor Resistances Semiconductors Embedded systems ALMOS-MK Microprocessors 3D networks-on-chip Cryptography Instruction sets Power Monitoring Switching element Manycore Area IP Protection Attaques par canaux cachés Adaptive systems Network-on-chip Three-dimensional displays CMOS integrated circuits Application Power Modeling Adaptive embedded systems Consommation Transistors Advanced Encryption Standard AES Actuators RO frequency Hardware Ring oscillator Through silicon vias 3D network-on-chip Adaptive Body Biasing 3D NoC STT-MRAM Storage node NVM Electromagnetic Analysis Memory device Method Performance Advanced PMA STT-MRAM 3D NoCs Aging FPGA Multiprocessing systems Gem5 Reliability Clocks Sécurité numérique Memory hierarchy IoT Architecture-level cache simulation framework Computer architecture Energy efficiency VLSI MRAM Adaptation dynamique de Body Bias Memory-in-logic Memory Spintronics Architecture description framework Embedded Systems Aging Effects Modeling Altera Program processors Accuracy Software Non volatile memory System reliability 3D manufacture variability Energy-efficiency Memory hierarhy System-on-chip Transistor Delays ALMOS Side-Channel Attacks Adaptive routing Africa Three-dimensional integrated circuits RSA Design space exploration Architectures reconfigurables Fault Injection Power demand Architecture FPGA security SoC Error analysis Architecture de Processeur Magnetic tunnel junction MTJ 28nm FD-SOI Field programmable gate arrays ARM bigLITTLE Xilinx Spartan 6 Security Through-silicon vias