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Distributed, Parallel and Biologically Inspired Systems 7th IFIP TC 10 Working Conference, DIPES 2010 and 3rd IFIP TC 10 International Conference, BICC 2010 Held as Part of WCC 2010, Brisbane, Australia, September 20-23, 2010 |
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Conference papers
Combining Software and Hardware LCS for Lightweight On-Chip Learning
Abstract : In this paper we present a novel two-stage method to realize a lightweight but very capable hardware implementation of a Learning Classifier System for on-chip learning. Learning Classifier Systems (LCS) allow taking good run-time decisions, but current hardware implementations are either large or have limited learning capabilities. In this work, we combine the capabilities of a software-based LCS, the XCS, with a lightweight hardware implementation, the LCT, retaining the benefits of both. We compare our method with other LCS implementations using the multiplexer problem and evaluate it with two chip-related problems, run-time task allocation and SoC component parameterization. In all three problem sets, we find that the learning and self-adaptation capabilities are comparable to a full-fledged system, but with the added benefits of a lightweight hardware implementation, namely small area size and quick response time. Given our work, autonomous chips based on Learning Classifier Systems become feasible.
Cited literature [24 references]
https://hal.inria.fr/hal-01054492
Contributor : Hal Ifip <>
Submitted on : Thursday, August 7, 2014 - 11:10:25 AM
Last modification on : Thursday, March 5, 2020 - 5:40:46 PM
Long-term archiving on: : Wednesday, November 26, 2014 - 1:21:23 AM
Contributor : Hal Ifip <>
Submitted on : Thursday, August 7, 2014 - 11:10:25 AM
Last modification on : Thursday, March 5, 2020 - 5:40:46 PM
Long-term archiving on: : Wednesday, November 26, 2014 - 1:21:23 AM
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