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Technological Innovation for the Internet of Things 4th IFIP WG 5.5/SOCOLNET Doctoral Conference on Computing, Electrical and Industrial Systems, DoCEIS 2013, Costa de Caparica, Portugal, April 15-17, 2013. Proceedings |
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Conference papers
A Low-Voltage CMOS Buffer for RF Applications Based on a Fully-Differential Voltage-Combiner
Abstract : This paper presents a new CMOS buffer circuit topology for radio-frequency (RF) applications based on a fully-differential voltage-combiner circuit, capable of operating at low-voltage. The proposed circuit uses a combination of common-source (CS) and common-drain (CD) devices. The simulation results show good levels of linearity and bandwidth. To improve total harmonic distortion (THD) a source degeneration technique is used. The proposed circuit has been designed in a 130nm logic CMOS technology and it achieves a simulated gain of 1.54 dB, a bandwidth of 1.14 GHz for a total power dissipation of 13.34 mW, when driving an RF active probe (with 0.8 pF in parallel with 200 kΩ).
Cited literature [6 references]
https://hal.archives-ouvertes.fr/hal-01348808
Contributor : Hal Ifip <>
Submitted on : Monday, July 25, 2016 - 4:53:53 PM
Last modification on : Thursday, June 4, 2020 - 6:26:03 PM
Contributor : Hal Ifip <>
Submitted on : Monday, July 25, 2016 - 4:53:53 PM
Last modification on : Thursday, June 4, 2020 - 6:26:03 PM
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