index - VLSI-SoC: Internet of Things Foundations

Table of Contents
VLSI-SoC: Internet of Things Foundations *Luc Claesen, Maria-Teresa Sanz-Pascual, Ricardo Reis, Arturo Sarmiento-Reyes (Eds.)*	Front Matter

Dynamic Programming-Based Lifetime Reliability Optimization in Networks-on-Chip *Liang Wang, Xiaohang Wang, Terrence Mak*	1-20
Efficient Utilization of Test Elevators to Reduce Test Time in 3D-ICs *Sreenivaas Muthyala, Nur Touba*	21-38
Design and Optimization of Multiple-Mesh Clock Network *Jinwook Jung, Dongsoo Lee, Youngsoo Shin*	39-57
Energy-Efficient Partitioning of Hybrid Caches in Multi-core Architecture *Dongwoo Lee, Kiyoung Choi*	58-74
Interval Arithmetic and Self Similarity Based Subthreshold Leakage Optimization in RTL Datapaths *Shilpa Pendyala, Srinivas Katkoori*	75-94
8T-SRAM cell with Improved Read and Write Margins in 65 nm CMOS Technology *Farshad Moradi, Mohammad Tohidi, Behzad Zeinali, Jens Madsen*	95-109
On the Co-simulation of SystemC with QEMU and OVP Virtual Platforms *Alessandro Lonardi, Graziano Pravadelli*	110-128
Statistical Evaluation of Digital Techniques for Σ Δ ADC BIST *Matthieu Dubois, Haralampos-G. Stratigopoulos, Salvador Mir, Manuel Barragan*	129-148
A Parallel MCMC-Based MIMO Detector: VLSI Design and Algorithm *Dominik Auras, Uwe Deidersen, Rainer Leupers, Gerd Ascheid*	149-169
Real-Time Omnidirectional Imaging System with Interconnected Network of Cameras *Kerem Seyid, Ömer Çogal, Vladan Popovic, Hossein Afshari, Alexandre Schmid, Yusuf Leblebici*	170-197
Transmission Channel Noise Aware Energy Effective LDPC Decoding *Thomas Marconi, Christian Spagnol, Emanuel Popovici, Sorin Cotofana*	198-219
Laser-Induced Fault Effects in Security-Dedicated Circuits Vincent Beroulle, Philippe Candelier, Stephan Castro, Giorgio Natale, Jean-Max Dutertre, Marie-Lise Flottes, David Hély, Guillaume Hubert, Regis Leveugle, Feng Lu, Paolo Maistri, Athanasios Papadimitriou, Bruno Rouzeyre, Clement Tavernier, Pierre Vanhauwaert	220-240

Designed by Inria-IES Team : Hosted by HAL :