Skip to Main content Skip to Navigation
Conference papers

A Parallel MCMC-Based MIMO Detector: VLSI Design and Algorithm

Abstract : Stochastic detection for multi-antenna (MIMO) systems promises communications performance close to max-log detection for certain SNR regimes, especially when the system iterates between detector and channel decoder following the Turbo Principle. In this work, we propose a parallel VLSI architecture for soft-input soft-output Markov chain Monte Carlo based stochastic MIMO detection. It features run-time adaptability to varying channel conditions, effectively allowing us to adjust the invested effort. Besides the details of our area-throughput efficient design, like the low-level algorithm and micro-architecture design, we also provide an extensive data set from our experiments regarding the detector’s communications performance and relate it to our VLSI implementation results. The provided data analysis highlights the architecture’s run-time adaptability and demonstrates how we can trade off throughput for improved communications performance.
Complete list of metadatas

Cited literature [15 references]  Display  Hide  Download

https://hal.inria.fr/hal-01383734
Contributor : Hal Ifip <>
Submitted on : Wednesday, October 19, 2016 - 10:47:34 AM
Last modification on : Thursday, March 5, 2020 - 5:40:22 PM

File

371768_1_En_9_Chapter.pdf
Files produced by the author(s)

Licence


Distributed under a Creative Commons Attribution 4.0 International License

Identifiers

Citation

Dominik Auras, Uwe Deidersen, Rainer Leupers, Gerd Ascheid. A Parallel MCMC-Based MIMO Detector: VLSI Design and Algorithm. 22th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC 2014), Oct 2014, Playa del Carmen, Mexico. pp.149-169, ⟨10.1007/978-3-319-25279-7_9⟩. ⟨hal-01383734⟩

Share

Metrics

Record views

181

Files downloads

196