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System Level Design from HW/SW to Memory for Embedded Systems: 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3–6, 2015, Proceedings

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Submitted on : Monday, August 6, 2018 - 3:10:07 PM
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Marcelo Götz, Gunar Schirner, Marco Aurélio Wehrmeister, Mohammad Abdullah Al Faruque, Achim Rettberg. System Level Design from HW/SW to Memory for Embedded Systems: 5th IFIP TC 10 International Embedded Systems Symposium, IESS 2015, Foz do Iguaçu, Brazil, November 3–6, 2015, Proceedings. Springer International Publishing, AICT-523, 2017, IFIP Advances in Information and Communication Technology, 978-3-319-90022-3. ⟨10.1007/978-3-319-90023-0⟩. ⟨hal-01854158⟩

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