16th International Conference on Real-Time and Network Systems

Rennes, France, October 16-17, 2008

http://rtns08.inria.fr

Overview

The purpose of the conference is to share ideas, experiences and informations among academic researchers, developers and service providers in the field of real-time systems and networks. RNTS'08 is the 16th edition of the conference formerly known as RTS (Real-Time Systems, Paris). The 12 first editions of RTS were french-speaking events held in Paris in conjunction with the RTS Embedded System exhibition. Since its 13th edition, the conference language of RTNS is english.

The purpose of the conference is to share ideas, experiences and information among academic researchers, developers and service providers in the field of real-time systems and networks:

  • Real-time system design and analysis: task and message scheduling, modeling, verification, evaluation, model-driven development, worst-case execution time estimation, distributed systems, fault-tolerance, quality of service, security;
  • Infrastructure and hardware for real-time systems: wired and wireless communication networks, fieldbuses, networked control systems, control/computing codesign, sensor networks, power-aware techniques;
  • Software technologies for real-time systems: compilers, programming languages, middleware and component-based technologies, operating systems, databases;
  • Applications: automotive, avionics, telecommunications, process control, multimedia.

Conference Committees

General chair

Isabelle Puaut (University of Rennes1 /IRISA)

Program comittee co-chairs

Giorgio Buttazzo (Scuola Superiore Sant'Anna, Pisa, Italy) and Pascale Minet (INRIA, Rocquencourt, France)

Local organizers

Elisabeth Lebret (INRIA/IRISA)
Violaine Tygreat (INRIA/IRISA)
Isabelle Puaut (University of Rennes/ IRISA)
Jean-Francois Deverge (University of Rennes/ IRISA)

Program comittee

S. Baruah (University of North Carolina, USA)
G. Bernat (University of York, UK)
E. Bini (Scuola Superiore Sant’Anna, Pisa, Italy)
G. Buttazzo (Scuola Superiore Sant’Anna, Pisa, Italy)
A. Crespo (Polytechnic University of Valencia, Spain)
J-D. Decotignie (CSEM, Neuchatel, Switzerland)
A-M. Deplanche (IRCCyN, Nantes, France)
T. Facchinetti (University of Pavia, Italy)
J. A. Fonseca (University of Aveiro, Portugal)
L. George (University of Paris 12, France)
J. Goossens (ULB, Brussels,Belgium)
G. Juanole (LAAS, Toulouse, France)
J. Kaiser (University of Magdeburg, Germany)
R. Kirner (TU Vienna, Austria)
T-W. Kuo (National Taiwan University, Taiwan)
L. Lo Bello (University of Catania, Italy)
Z. Mammeri (IRIT/UPS Toulouse, France)
P. Marquet (INRIA/LIFL, Lille, France)
P. Minet (INRIA-Rocquencourt, France)
D. Mosse (University of Pittsburgh, USA)
N. Navet (INRIA-Loria, Nancy, France)
N. Nissanke (London South Bank University, UK)
M. Nolin (Mlardalen University, Sweden)
M. Pouzet (Université Paris Sud-LRI, France)
I. Puaut (University of Rennes/IRISA, France)
P. Richard (LISI, Poitiers, France)
C. Rochange (IRIT Toulouse, France)
G. Rodriguez-Navas (University of Balearic Islands,
Palma de Mallorca, Spain)

B. Sadeg (LITIS - University of Le Havre, France)
M. Silly-Chetto (IRCCyN, Nantes, France)
D. Simon (INRIA-Rhônes Alpes, France)
F. Simonot-Lion (LORIA-INPL, Nancy, France)
E. Tovar (Polytechnic Institute of Porto, Portugal)
Y. Trinquet (IRCCyN, Nantes, France)
F. Vasques (University of Porto, Portugal)
F. Vernadat (LAAS, Toulouse, France)

Steering Committee

N. Navet (INRIA-Loria, Nancy, France)
F. Simonot-Lion (LORIA-INPL, Nancy, France)
I. Puaut (University of Rennes1 /IRISA)
G. Juanole (LAAS, Toulouse, France)
P. Richard (LISI / Poitiers, France)
J. Goossens (ULB, Brussels, Belgium)

Conference schedule

Uniprocessor scheduling 1

An Investigation into Server Parameter Selection for Hierarchical Fixed Priority Pre-emptive Systems
o Robert Davis, University of York
o Alan Burns, University of York

User Land Approximate Slack Stealer with Low Time Complexity
o Damien Masson, Laboratoire d'informatique de l'institut Gaspard-Monge, Université Paris-Est
o Serge Midonnet, Laboratoire d'informatique de l'institut Gaspard-Monge, Université Paris-Est

Dependable real-time systems

Enhancing a Dependable Multiserver Operating System with Temporal Protection via Resource Reservations
o Antonio Mancina, Scuola Superiore Sant'Anna
o Jorrit Herder, Vrije Universiteit Amsterdam
o Ben Gras, Vrije Universiteit Amsterdam
o Andrew Tanenbaum, Vrije Universiteit Amsterdam

Towards a Unified X-by-Wire Solution with HUMS, HM & TTP: Lessons Learned in Implementing it to a Drive-by-Wire Vehicle
o John Melentis, University of Sussex
o Elias Stipidis, University of Sussex
o Periklis Charchalakis, University of Sussex
o Falah Ali, University of Sussex

Pattern-triggered task scheduling

(m,k)-Firm Constraints and DBP Scheduling: Impact of the Initial k-Sequence and Exact Feasibility Test
o Joel Goossens, Universite Libre de Bruxelles

Exact Scheduling Analysis of Non-Accummulatively Monotonic Multiframe Tasks
o Areej Zuhily, University of York
o Alan Burns, University of York

Event-Pattern Triggered Real-Time Tasks
o Jan Carlson, Mälardalen Real-Time Research Centre (MRTC)
o Jukka Mäki-Turja, Mälardalen Real-Time Research Centre (MRTC)
o Mikael Nolin, Mälardalen Real-Time Research Centre (MRTC)

Uniprocessor scheduling 2

Quantifying the Sub-Optimality of Uniprocessor Fixed-Priority Scheduling
o Sanjoy Baruah, University of North Carolina
o Alan Burns, University of York

Improved Approximate Response Time Bounds for Static-Priority Tasks
o Thi Huyen Chau Nguyen, Lisi/Ensma
o Pascal Richard, Lisi/Ensma
o Enrico Bini, Scuola Superiore Sant'Anna

Feasibility Analysis of Non-Concrete Real-Time Transactions With EDF Assignment Priority
o Ahmed Rahni, LISI/ENSMA
o Emmanuel Grolleau, LISI/ENSMA
o Michael Richard, LISI/ENSMA

Distributed and multiprocessor scheduling

Minimizing the Number of Processors Used by Real-Time Distributed Systems
o François Dorin, LISI - Laboratoire d'Informatique Scientifique et Industrielle
o Michael Richard, LISI - Laboratoire d'Informatique Scientifique et Industrielle
o Emmanuel Grolleau, LISI - Laboratoire d'Informatique Scientifique et Industrielle
o Pascal Richard, LISI - Laboratoire d'Informatique Scientifique et Industrielle

Pfair Scheduling Improvement to Reduce Interprocessor Migrations
o Dalia Aoun, Université de Nantes - IRCCyN
o Anne-Marie Deplanche, Université de Nantes - IRCCyN
o Yvon Trinquet, Université de Nantes - IRCCyN

Delay Evaluation and Compensation in Ethernet-Networked Control Systems
o Boussad Addad, LURPA, ENS-Cachan
o Said Amari, LURPA, ENS-Cachan

Worst-case execution time estimation

Attacking the Sources of Unpredictability in the Instruction Cache Behavior
o Enrico Mezzetti, University of Padua
o Niklas Holsti, Tidorum Ltd.
o Antoine Colin, Rapita Systems Ltd.
o Guillem Bernat, Rapita Systems Ltd.
o T. Vardanega, University of Padua

Accurate Analysis of Memory Latencies for WCET Estimation
o Roman Bourgade, IRIT - University of Toulouse
o Clément Ballabriga, IRIT - University of Toulouse
o Hugues Cassé, IRIT - University of Toulouse
o Christine Rochange, IRIT - University of Toulouse