HLS Tools for FPGA : faster development with better performances
Abstract
Designing FPGA-based accelerators is a difficult and time-consuming task which can be softened by the emergence of new generations of High Level Synthesis Tools. This paper describes how the Impulse-C C-to-hardware compiler tool has been used to develop efficient hardware for a known genomic sequence alignment algorithms and reports HLL designs performance outperforming traditional hand written optimized HDL implementations.
Domains
Hardware Architecture [cs.AR]
Origin : Files produced by the author(s)
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