AADL is dedicated to high-level design and evaluation of embedded systems. It allows describing both system structure and functional aspects via a component-based approach, e.g., GALS system. The polychronous model of computation stands out from other synchronous specification models by the fact that it allows one specifying a system whose components can have their own activation clocks. It is well adapted to support a GALS design methodology. Its framework Polychrony provides models and methods for modeling, transformation and validation of embedded systems. This paper proposes a methodology for modeling and validation of embedded systems specified in AADL via the multi-clock synchronous programming language Signal. This methodology includes system-level modeling via AADL, automatic transformations from the high-level AADL model to the polychronous model, code distribution, formal verification and simulation of the obtained polychronous model. Our transformation takes into account both the system architecture, particularly described in Integrated Modular Avionics (IMA), and functional aspects, e.g., software components implemented in the polychronous language Signal. AADL components are modeled into the polychronous MoC within the IMA architecture using a library of ARINC services. Distributed code generation is obtained with Polychrony. A case study illustrates our methodology for the reliable design of AADL applications.