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Error Recovery Technique for Coarse-Grained Reconfigurable Architectures

Muhammad Moazam Azeem 1 Stanislaw Piestrak 2 Olivier Sentieys 2 Sébastien Pillement 2
1 Orange Labs [Issy les Moulineaux]
2 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
Inria Rennes – Bretagne Atlantique , IRISA-D3 - ARCHITECTURE
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Conference papers
Complete list of metadatas
https://hal.inria.fr/hal-00650599
Contributor : Sébastien Pillement <>
Submitted on : Sunday, December 11, 2011 - 11:48:48 AM
Last modification on : Wednesday, December 18, 2019 - 4:59:29 PM

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  • HAL Id : hal-00650599, version 1

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CNRS | INRIA | UNIV-RENNES1 | IRISA | IETR | IRISA-D3 | INSTITUT-TELECOM | UR1-UFR-ISTIC | UNIV-RENNES

Citation

Muhammad Moazam Azeem, Stanislaw Piestrak, Olivier Sentieys, Sébastien Pillement. Error Recovery Technique for Coarse-Grained Reconfigurable Architectures. IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2011, Cottbus, Germany. ⟨hal-00650599⟩

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