Skip to Main content Skip to Navigation
Conference papers

A Framework for the Design of Reconfigurable Fault Tolerant Architectures

Hung-Manh Pham 1 Sébastien Pillement 1 Sébastien Le Nours 2 Olivier Pasquier 2
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
IRISA-D3 - ARCHITECTURE, Inria Rennes – Bretagne Atlantique
2 IREENA - Institut de Recherche en Electrotechnique et Electronique de Nantes Atlantique EA4642
Document type :
Conference papers
Complete list of metadata
https://hal.inria.fr/hal-00650800
Contributor : Sébastien Pillement Connect in order to contact the contributor
Submitted on : Monday, December 12, 2011 - 12:02:07 PM
Last modification on : Tuesday, October 19, 2021 - 11:58:51 PM

Identifiers

  • HAL Id : hal-00650800, version 1

Collections

UNIV-NANTES | CNRS | INRIA | UNIV-RENNES1 | IRISA | IRISA-D3 | UR1-MATH-STIC | UR1-UFR-ISTIC | UNIV-RENNES | INSTITUT-TELECOM | INSA-RENNES | EC-PARIS | UR1-MATH-NUM

Citation

Hung-Manh Pham, Sébastien Pillement, Sébastien Le Nours, Olivier Pasquier. A Framework for the Design of Reconfigurable Fault Tolerant Architectures. Conference on Design and Architectures for Signal and Image Processing (DASIP), 2011, Tampere, Finland. ⟨hal-00650800⟩

Export

BibTeX TEI DC DCterms EndNote

Share

Metrics

Les métriques sont temporairement indisponibles

 

Contact                    Legal Notice                    Personal Data