Broadcast with mask on a Massively Parallel Processing on a Chip

Abstract : The delay of instructions broadcast has a significant impact on the performance of Single Instruction Multiple Data (SIMD) architecture. This is especially true for massively parallel processing Systems-on-Chip (mppSoC), where the processing stage and that of setting up the communication mechanism need several clock periods. Subnetting is the strategy used to partition a single physical network into more than one smaller logical sub-networks (subnets). This technique better controls the broadcast instructions domain and the data traffic between network nodes. Furthermore, it allows to separate synchronous communications from asynchronous processing which maintains reliable communications and rapid processing through parallel processors. This paper describes the design of a communication model called broadcast with mask. This model is dedicated to mppSoC architecture with a huge number of processor elements because it maintains performances even when the number of processors increases. Simulation results and an FPGA implementation validate our approach.
Document type :
Other publications
Liste complète des métadonnées

Cited literature [17 references]  Display  Hide  Download

https://hal.inria.fr/hal-00688418
Contributor : Mister Dart <>
Submitted on : Monday, April 23, 2012 - 9:34:25 AM
Last modification on : Thursday, February 21, 2019 - 10:52:49 AM
Document(s) archivé(s) le : Tuesday, July 24, 2012 - 2:20:34 AM

File

DRNoC2012.pdf
Files produced by the author(s)

Identifiers

  • HAL Id : hal-00688418, version 1

Citation

Hana Krichene, Mouna Baklouti, Mohamed Abid, Philippe Marquet, Jean-Luc Dekeyser. Broadcast with mask on a Massively Parallel Processing on a Chip. workshop drnoc2012. 2012. 〈hal-00688418〉

Share

Metrics

Record views

296

Files downloads

176