Broadcast with mask on a Massively Parallel Processing on a Chip

Abstract : The delay of instructions broadcast has a significant impact on the performance of Single Instruction Multiple Data (SIMD) architecture. This is especially true for massively parallel processing Systems-on-Chip (mppSoC), where the processing stage and that of setting up the communication mechanism need several clock periods. Subnetting is the strategy used to partition a single physical network into more than one smaller logical sub-networks (subnets). This technique better controls the broadcast instructions domain and the data traffic between network nodes. Furthermore, it allows to separate synchronous communications from asynchronous processing which maintains reliable communications and rapid processing through parallel processors. This paper describes the design of a communication model called broadcast with mask. This model is dedicated to mppSoC architecture with a huge number of processor elements because it maintains performances even when the number of processors increases. Simulation results and an FPGA implementation validate our approach.
Type de document :
Autre publication
workshop drnoc2012. 2012
Liste complète des métadonnées

Littérature citée [17 références]  Voir  Masquer  Télécharger
Contributeur : Mister Dart <>
Soumis le : lundi 23 avril 2012 - 09:34:25
Dernière modification le : vendredi 6 juillet 2018 - 23:48:01
Document(s) archivé(s) le : mardi 24 juillet 2012 - 02:20:34


Fichiers produits par l'(les) auteur(s)


  • HAL Id : hal-00688418, version 1


Hana Krichene, Mouna Baklouti, Mohamed Abid, Philippe Marquet, Jean-Luc Dekeyser. Broadcast with mask on a Massively Parallel Processing on a Chip. workshop drnoc2012. 2012. 〈hal-00688418〉



Consultations de la notice


Téléchargements de fichiers