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An efficient algorithm for custom instruction enumeration

Emmanuel Casseau 1 Chenglong Xiao 1
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
Inria Rennes – Bretagne Atlantique , IRISA-D3 - ARCHITECTURE
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Conference papers
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https://hal.inria.fr/hal-00746760
Contributor : Emmanuel Casseau <>
Submitted on : Monday, October 29, 2012 - 4:01:02 PM
Last modification on : Friday, July 10, 2020 - 4:03:08 PM

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  • HAL Id : hal-00746760, version 1

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CNRS | INRIA | UNIV-RENNES1 | IRISA | IRISA-D3 | UR1-UFR-ISTIC | UNIV-RENNES | INSTITUT-TELECOM | INSA-RENNES

Citation

Emmanuel Casseau, Chenglong Xiao. An efficient algorithm for custom instruction enumeration. Great lakes symposium on VLSI, May 2011, Lausanne, Switzerland. ⟨hal-00746760⟩

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