Designing Processors Using MAsS, a Modular and Lightweight Instruction-level Exploration Tool

Matthieu Texier 1, 2 Erwan Piriou 2 Mathieu Thevenin 2 Raphaël David 2
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
Inria Rennes – Bretagne Atlantique , IRISA-D3 - ARCHITECTURE
2 Embedded Computing Laboratory [Gif-sur-Yvette]
Type de document :
Communication dans un congrès
Conference on Design and Architectures for Signal and Image Processing (DASIP), Nov 2011, Tampere, Finland. 2011
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https://hal.inria.fr/hal-00747704
Contributeur : Olivier Sentieys <>
Soumis le : jeudi 1 novembre 2012 - 09:30:45
Dernière modification le : mercredi 13 février 2019 - 11:12:02

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  • HAL Id : hal-00747704, version 1

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CEA | INRIA | UNIV-RENNES1 | IRISA | IRISA-D3 | INSTITUT-TELECOM | UR1-UFR-ISTIC | UNIV-RENNES

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Matthieu Texier, Erwan Piriou, Mathieu Thevenin, Raphaël David. Designing Processors Using MAsS, a Modular and Lightweight Instruction-level Exploration Tool. Conference on Design and Architectures for Signal and Image Processing (DASIP), Nov 2011, Tampere, Finland. 2011. 〈hal-00747704〉

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