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Conference papers

Designing Processors Using MAsS, a Modular and Lightweight Instruction-level Exploration Tool

Matthieu Texier 1, 2 Erwan Piriou 2 Mathieu Thevenin 2 Raphaël David 2
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
Inria Rennes – Bretagne Atlantique , IRISA-D3 - ARCHITECTURE
2 Embedded Computing Laboratory [Gif-sur-Yvette]
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Conference papers
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https://hal.inria.fr/hal-00747704
Contributor : Olivier Sentieys Connect in order to contact the contributor
Submitted on : Thursday, November 1, 2012 - 9:30:45 AM
Last modification on : Thursday, January 20, 2022 - 5:33:26 PM

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  • HAL Id : hal-00747704, version 1

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CEA | CNRS | INRIA | UNIV-RENNES1 | IRISA | IRISA-D3 | UR1-MATH-STIC | UR1-UFR-ISTIC | UNIV-RENNES | INSTITUT-TELECOM | INSA-RENNES | UR1-MATH-NUM | EC-PARIS

Citation

Matthieu Texier, Erwan Piriou, Mathieu Thevenin, Raphaël David. Designing Processors Using MAsS, a Modular and Lightweight Instruction-level Exploration Tool. Conference on Design and Architectures for Signal and Image Processing (DASIP), Nov 2011, Tampere, Finland. ⟨hal-00747704⟩

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