Compiler-directed memory management for heterogeneous MPSoCs

Abstract : Advances in semiconductor technique enable multiple processor cores to be integrated into a single chip. Heterogeneous multiprocessor system-on-a-chip (MPSoC) becomes important platforms to accelerate applications. However, compilation techniques for memorymanagement on MPSoCs still lag behind. This paper presents an automatic memorymanagement framework to orchestrate the data movement between local memory and off-chip memory. In our framework, data alignment, hierarchically data distribution, communication generation, loop tiling, and loop splitting are employed. Moreover, a communication optimization approach is proposed to improve data reuse. These techniques can reduce off-chip memory access and exploit data locality. Experimental results on Cell BE show that our data management framework can generate efficient code for the program.
Type de document :
Article dans une revue
Journal of Systems Architecture, Elsevier, 2011, 57 (1), pp.134-145. 〈10.1016/j.sysarc.2010.10.008〉
Liste complète des métadonnées

https://hal.inria.fr/hal-00747819
Contributeur : Ist Rennes <>
Soumis le : vendredi 2 novembre 2012 - 11:00:17
Dernière modification le : mardi 16 janvier 2018 - 15:54:17

Identifiants

Citation

Miao Wang, François Bodin. Compiler-directed memory management for heterogeneous MPSoCs. Journal of Systems Architecture, Elsevier, 2011, 57 (1), pp.134-145. 〈10.1016/j.sysarc.2010.10.008〉. 〈hal-00747819〉

Partager

Métriques

Consultations de la notice

292