R. Kumar and S. Nelvagal, Protocol conversion using supervisory control techniques, Proceedings of Joint Conference on Control Applications Intelligent Control and Computer Aided Control System Design, pp.32-37, 1996.
DOI : 10.1109/CACSD.1996.555193

R. Passerone, L. De-alfaro, T. Henzinger, and A. Sangiovanni-vincentelli, Convertibility verification and converter synthesis, Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design , ICCAD '02, 2002.
DOI : 10.1145/774572.774592

V. Silva, S. Ramesh, and A. Sowmya, Synchronous protocol automata: A framework for modelling and verification of SoC communication architectures, Proc. Computers & Digital Techniques, pp.20-27, 2005.

M. Tivoli, P. Fradet, A. Girault, and G. Goessler, Adaptor Synthesis for Real-Time Components, International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS), pp.185-200, 2007.
DOI : 10.1007/978-3-540-71209-1_16

R. Sinha, P. S. Roop, S. Basu, and Z. Salcic, Multi-clock Soc design using protocol conversion, 2009 Design, Automation & Test in Europe Conference & Exhibition, 2009.
DOI : 10.1109/DATE.2009.5090644
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.553.2350

H. Chang, L. Cooke, M. Hunt, G. Martin, A. Mcnelly et al., Surviving the SoC Revolution: A guide to platform based design, 1999.

P. Green, Protocol Conversion, IEEE Transactions on Communications, vol.34, issue.3, pp.257-268, 1986.
DOI : 10.1109/TCOM.1986.1096529

S. Lam, Protocol conversion, IEEE Transactions on Software Engineering, vol.14, issue.3, pp.353-362, 1988.
DOI : 10.1109/32.4655

G. Borriello, S. Narayan, and D. Gajski, A new interface specification methodology and its application to transducer synthesis Interfacing incompatible protocols using interface process generation, Design Automation Conference (DAC), pp.468-473, 1988.

N. Halbwachs, Synchronous Programming of Reactive Sys- tems, Kluwer International Series in Engineering and Computer Science, 1994.

P. Ramadge and W. Wonham, The control of discrete event systems, Proceedings of the IEEE, vol.77, issue.1, pp.81-98, 1989.
DOI : 10.1109/5.21072

P. Roop, A. Sowmya, and S. Ramesh, Forced simulation: A technique for automating component reuse in embedded systems, ACM Transactions on Design Automation of Electronic Systems, vol.6, issue.4, pp.602-628, 2001.
DOI : 10.1145/502175.502185

R. Milner, Communication and Concurrency, 1989.

C. Kern and M. R. Greenstreet, Formal verification in hardware design: a survey, ACM Transactions on Design Automation of Electronic Systems, vol.4, issue.2, pp.123-193, 1999.
DOI : 10.1145/307988.307989

M. Abadi and L. Lamport, The existence of refinement mappings, Theoretical Computer Science, vol.82, issue.2, pp.253-284, 1991.
DOI : 10.1016/0304-3975(91)90224-P

N. Maretti, Mechanized verification of refinement, International Conference on Theorem Provers in Circuit Design -Theory, Practice and Experience, pp.185-202, 1994.

R. Cleaveland, Tableau-based model checking in the propositional mu-calculus, Acta Informatica, vol.27, issue.8, pp.725-747, 1990.
DOI : 10.1007/BF00264284

R. Sinha, P. S. Roop, S. Basu, and Z. Salcic, An approach for resolving control and data mismatches in SoCs, School of Engineering Report, vol.667, 2008.