Transformation-based Exploration of Data-Parallel Architecture for Customizable Hardware: A JPEG Encoder Case Study

Abstract : In this paper, we present a method for the design of MPSoCs for complex data-intensive applications. This method aims at a blend exploration of the communication, the memory system architecture and the computation resource parallelism. The proposed method is exemplified on a JPEG Encoder case study by describing all the design steps. Our method allows for a JPEG encoder implementation having a throughput increase of 84% and an increase of the achievable FPGA maximum frequency fmax of 64% with an area overhead of 6x with respect to a reference solution. Our method is also assessed with additional explorations of applications from different domains.
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https://hal.inria.fr/hal-00758161
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Submitted on : Wednesday, November 28, 2012 - 11:29:00 AM
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Rosilde Corvino, Erkan Diken, Abdoulaye Gamatié, Lech Jozwiak. Transformation-based Exploration of Data-Parallel Architecture for Customizable Hardware: A JPEG Encoder Case Study. Euromicro Conference on Digital System Design (DSD 2012), Sep 2012, Cesme, Izmir, Turkey. ⟨hal-00758161⟩

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