Transformation-based Exploration of Data-Parallel Architecture for Customizable Hardware: A JPEG Encoder Case Study

Abstract : In this paper, we present a method for the design of MPSoCs for complex data-intensive applications. This method aims at a blend exploration of the communication, the memory system architecture and the computation resource parallelism. The proposed method is exemplified on a JPEG Encoder case study by describing all the design steps. Our method allows for a JPEG encoder implementation having a throughput increase of 84% and an increase of the achievable FPGA maximum frequency fmax of 64% with an area overhead of 6x with respect to a reference solution. Our method is also assessed with additional explorations of applications from different domains.
Type de document :
Communication dans un congrès
Euromicro Conference on Digital System Design (DSD 2012), Sep 2012, Cesme, Izmir, Turkey. IEEE, 2012
Liste complète des métadonnées

Littérature citée [20 références]  Voir  Masquer  Télécharger

https://hal.inria.fr/hal-00758161
Contributeur : Abdoulaye Gamatié <>
Soumis le : mercredi 28 novembre 2012 - 11:29:00
Dernière modification le : jeudi 11 janvier 2018 - 06:22:13
Document(s) archivé(s) le : samedi 17 décembre 2016 - 16:30:20

Fichier

rcorvino2012dsd.pdf
Fichiers produits par l'(les) auteur(s)

Identifiants

  • HAL Id : hal-00758161, version 1

Collections

Citation

Rosilde Corvino, Erkan Diken, Abdoulaye Gamatié, Lech Jozwiak. Transformation-based Exploration of Data-Parallel Architecture for Customizable Hardware: A JPEG Encoder Case Study. Euromicro Conference on Digital System Design (DSD 2012), Sep 2012, Cesme, Izmir, Turkey. IEEE, 2012. 〈hal-00758161〉

Partager

Métriques

Consultations de la notice

225

Téléchargements de fichiers

169