Test Harness on a Preconditioned Conjugate Gradient Solver on GPUs: An Efficiency Analysis

Abstract : The parallelization of numerical simulation algo- rithms, i.e., their adaptation to parallel processing architectures, is an aim to reach in order to hinder exorbitant execution times. The parallelism has been imposed at the level of processor ar- chitectures and graphics cards are now used for general-purpose calculation, also known as "General-Purpose computation on Graphics Processing Unit (GPGPU)". The clear benefit is the excellent performance over price ratio. Besides hiding the low level programming, software engineering leads to a faster and more secure application development. This paper presents the real interest of using GPU processors to increase performance of larger problems which concern electrical machines simulation. Indeed, we show that our auto-generated code applied to several models allows achieving speedups of the order of 10x.
Type de document :
Communication dans un congrès
CEFC - 2012, Nov 2012, Oita, Japan. 2012
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https://hal.inria.fr/hal-00759476
Contributeur : Mister Dart <>
Soumis le : vendredi 30 novembre 2012 - 16:58:22
Dernière modification le : jeudi 11 janvier 2018 - 06:22:13

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  • HAL Id : hal-00759476, version 1

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Wendell Rodrigues, Loïc Chevalier, Yvonnick Le Menach, Frédéric Guyomarch. Test Harness on a Preconditioned Conjugate Gradient Solver on GPUs: An Efficiency Analysis. CEFC - 2012, Nov 2012, Oita, Japan. 2012. 〈hal-00759476〉

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