Exploiting residue number system for power-efficient digital signal processing in embedded processors

Rooju Chokshi 1 Aviral Shrivastava 2 Krzysztof Berezowski 2, 3 Stanislaw Piestrak 4, 5
1 Microsoft Corporation [Redmond]
2 Department of Computer Science and Engineering [Tempe]
3 TIMA - Techniques of Informatics and Microelectronics for integrated systems Architecture
4 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
Inria Rennes – Bretagne Atlantique , IRISA-D3 - ARCHITECTURE
5 LICM - Laboratoire interfaces, capteurs et microélectronique
Type de document :
Communication dans un congrès
ACM. IEEE/ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), Oct 2009, Grenoble, France. pp.19-28, 2009
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https://hal.inria.fr/hal-00779995
Contributeur : Olivier Sentieys <>
Soumis le : mardi 22 janvier 2013 - 21:33:40
Dernière modification le : jeudi 15 novembre 2018 - 11:57:40

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  • HAL Id : hal-00779995, version 1

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Rooju Chokshi, Aviral Shrivastava, Krzysztof Berezowski, Stanislaw Piestrak. Exploiting residue number system for power-efficient digital signal processing in embedded processors. ACM. IEEE/ACM International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), Oct 2009, Grenoble, France. pp.19-28, 2009. 〈hal-00779995〉

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