L. P. Carloni, K. L. Mcmillan, and A. L. Sangiovanni-vincentelli, Theory of latency-insensitive design, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.20, issue.9, pp.1059-1076, 2001.
DOI : 10.1109/43.945302

L. P. Carloni, K. L. Mcmillan, A. Saldanha, and A. L. Sangiovanni-vincentelli, A methodology for correct-byconstruction latency insensitive design, Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD '99), pp.309-315, 1999.

L. P. Carloni and A. L. Sangiovanni-vincentelli, Performance analysis and optimization of latency insensitive systems, Proceedings of the 37th conference on Design automation , DAC '00, pp.361-367, 2000.
DOI : 10.1145/337292.337441

T. Chelcea and S. M. Nowick, Robust interfaces for mixedtiming systems with application to latency-insensitive protocols, Proceedings of the 38th conference on Design automation (DAC '01), pp.21-26, 2001.

A. Chakraborty and M. R. Greenstreet, A minimalist sourcesynchronous interface, Proceedings of the 15th Annual IEEE International ASIC/SOC Conference, pp.443-447, 2002.

F. Commoner, A. W. Holt, S. Even, and A. Pnueli, Marked directed graphs, Journal of Computer and System Sciences, vol.5, issue.5, pp.511-523, 1971.
DOI : 10.1016/S0022-0000(71)80013-2

URL : http://doi.org/10.1016/s0022-0000(71)80013-2

C. Ramchandani, Analysis of asynchronous concurrent systems by timed Petri nets, 1973.

J. Carlier and P. Chrétienne, Probì eme d'ordonnancement: modélisation, complexité, algorithmes, 1988.

F. Baccelli, G. Cohen, G. J. Olsder, and J. Quadrat, Synchronization and Linearity: An Algebra for Discrete Event Systems, 1992.

V. Van-dongen, G. R. Gao, and Q. Ning, A polynomial time method for optimal software pipelining, Proceedings of the 2nd Joint International Conference on Vector and Parallel Processing (CONPAR '92), pp.613-624, 1992.
DOI : 10.1007/3-540-55895-0_462

F. Boyer, E. M. Aboulhamid, Y. Savaria, and . Boyer, Optimal design of synchronous circuits using software pipelining techniques, Proceedings of IEEE International Conference on Computer Design (ICCD '98), pp.62-67, 1998.

M. R. Casu and L. Macchiarulo, A new approach to latency insensitive design, Proceedings of the 41st annual conference on Design automation , DAC '04, pp.576-581, 2004.
DOI : 10.1145/996566.996725

A. Cohen, M. Duranton, C. Eisenbeis, C. Pagetti, F. Plateau et al., N-synchronous Kahn networks: a relaxed model of synchrony for real-time systems, Proceedings of the 33rd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL '06), pp.180-193, 2006.

J. Boucaron, J. Millo, and R. De-simone, Another Glance at Relay Stations in Latency-Insensitive Design, Electronic Notes in Theoretical Computer Science, vol.146, issue.2, pp.41-59, 2006.
DOI : 10.1016/j.entcs.2005.05.035

M. R. Casu and L. Macchiarulo, A detailed implementation of latency insensitive protocols, Proceedings of Formal Methods for Globally Asyncronous Locally Syncronous Architectures, pp.94-103, 2003.

A. Benveniste, P. Caspi, S. A. Edwards, N. Halbwachs, P. L. Guernic et al., The synchronous languages 12 years later, Proceedings of the IEEE, vol.91, issue.1, pp.64-83, 2003.
DOI : 10.1109/JPROC.2002.805826

A. V. Ovlev and A. M. La-vagno, High-lev el modeling and design of asynchronous interface logic, IEEE Design and Test of Computers, vol.12, issue.1, pp.32-40, 1995.

M. R. Casu and L. Macchiarulo, Floorplanning for throughput, Proceedings of the 2004 international symposium on Physical design , ISPD '04, pp.62-69, 2004.
DOI : 10.1145/981066.981081

C. André, Representation and analysis of reactive behaviors: a synchronous approach, Proceedings of the IMAC Multiconference on Computational Engineering in Systems Applications (CESA '96), pp.19-29, 1996.

A. Dasdan, Experimental analysis of the fastest optimum cycle ratio and mean algorithms, ACM Transactions on Design Automation of Electronic Systems, vol.9, issue.4, pp.385-418, 2004.
DOI : 10.1145/1027084.1027085