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Programmable routers for efficient mapping of applications onto NoC-based MPSoCs
Abstract : We extend the state-of-the-art DSPIN network-on-chip architecture by defining programmable NoC routers that can establish effective static scheduling and routing of data packets as demanded by the application. Router programs are the result of a general compilation process which targets the NoC and the computing cores altogether. The objective is to reduce NoC contentions, improving speed and timing predictability. We consider the range of applications of such an approach and provide results on two of them (a simple embedded controller and an FFT).
Cited literature [17 references]
https://hal.inria.fr/hal-00787497
Contributor : Manel Djemal <>
Submitted on : Tuesday, February 12, 2013 - 11:40:52 AM
Last modification on : Tuesday, May 26, 2020 - 6:50:21 PM
Document(s) archivé(s) le : Monday, May 13, 2013 - 4:10:46 AM
Contributor : Manel Djemal <>
Submitted on : Tuesday, February 12, 2013 - 11:40:52 AM
Last modification on : Tuesday, May 26, 2020 - 6:50:21 PM
Document(s) archivé(s) le : Monday, May 13, 2013 - 4:10:46 AM
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PID2529925.pdf
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