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Conference Papers Year : 2012

Programmable routers for efficient mapping of applications onto NoC-based MPSoCs

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Abstract

We extend the state-of-the-art DSPIN network-on-chip architecture by defining programmable NoC routers that can establish effective static scheduling and routing of data packets as demanded by the application. Router programs are the result of a general compilation process which targets the NoC and the computing cores altogether. The objective is to reduce NoC contentions, improving speed and timing predictability. We consider the range of applications of such an approach and provide results on two of them (a simple embedded controller and an FFT).
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Dates and versions

hal-00787497 , version 1 (12-02-2013)

Identifiers

  • HAL Id : hal-00787497 , version 1

Cite

Manel Djemal, François Pêcheux, Dumitru Potop-Butucaru, Robert de Simone, Franck Wajsburt, et al.. Programmable routers for efficient mapping of applications onto NoC-based MPSoCs. DASIP 2012 -Conference on Design and Architectures for Signal and Image Processing, Oct 2012, Karlsruhe, Germany. pp.1-8. ⟨hal-00787497⟩
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