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Dynamic Thread Mapping Based on Machine Learning for Transactional Memory Applications

Márcio Castro 1, * Luís Fabrício Góes 2 Luiz Gustavo Fernandes 3 Jean-François Mehaut 1
* Corresponding author
1 MESCAL - Middleware efficiently scalable
LIG - Laboratoire d'Informatique de Grenoble, Inria Grenoble - Rhône-Alpes
2 PUC Minas - Pontifícia Universidade Católica de Minas Gerais
3 PUCRS - Pontifícia Universidade Católica do Rio Grande do Sul [Porto Alegre]
Abstract : Thread mapping is an appealing approach to efficiently exploit the potential of modern chip-multiprocessors. However, efficient thread mapping relies upon matching the behavior of an application with system characteristics. In particular, Software Transactional Memory (STM) introduces another dimension due to its runtime system support. In this work, we propose a dynamic thread mapping approach to automatically infer a suitable thread mapping strategy for transactional memory applications composed of multiple execution phases with potentially different transactional behavior in each phase. At runtime, it profiles the application at specific periods and consults a decision tree generated by a Machine Learning algorithm to decide if the current thread mapping strategy should be switched to a more adequate one. We implemented this approach in a state-of-the-art STM system, making it transparent to the user. Our results show that the proposed dynamic approach presents performance improvements up to 31% compared to the best static solution.
Keywords : Machine learning Transactional memory Dynamic thread mapping
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Conference papers
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https://hal.inria.fr/hal-00788013
Contributor : Arnaud Legrand Connect in order to contact the contributor
Submitted on : Wednesday, February 13, 2013 - 3:03:08 PM
Last modification on : Thursday, October 21, 2021 - 3:47:40 AM

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CNRS | INRIA | UGA | LIG_SRCPR_NANOSIM | LIG_SRCPR | LIG | POLYTECH-GRENOBLE | LIG_SIDCH

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Márcio Castro, Luís Fabrício Góes, Luiz Gustavo Fernandes, Jean-François Mehaut. Dynamic Thread Mapping Based on Machine Learning for Transactional Memory Applications. Euro-Par 2012 - 18th International European Conference on Parallel and Distributed Computing, Aug 2012, Rhodes Island, Greece, Greece. pp.465-476, ⟨10.1007/978-3-642-32820-6_47⟩. ⟨hal-00788013⟩

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