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Modeling Timing Requirements in Problem Frames Using CCSL
Abstract : As the embedded systems are becoming more and more complex, requirements engineering approaches are needed for modeling requirements, especially the timing requirements. Among various requirements engineering approaches, the Problem Frames(PF) approach is particularly useful in requirements modeling for the embedded systems due to the characteristic that PF pays special attention to the environment entities that will interact with the to-be software. However, no concern is given on timing requirements of PF at present. This paper studies how to add timing constraints on problem domains in PF. Our approach is to integrate the problem representation frame in PF with the timing representation mechanism of MARTE(Modeling and Analysis of Real Time and Embedded systems). A unified problem frame modeling process integrated with timing constraints is provided, and problem frame requirements with timing constraints expressed by MARTE/CCSL (Clock Constraint Specification Language) and clock construction operators are obtained.
Cited literature [16 references]
https://hal.inria.fr/hal-00809644
Contributor : Frédéric Mallet <>
Submitted on : Thursday, May 2, 2019 - 4:14:41 PM
Last modification on : Tuesday, May 26, 2020 - 6:50:21 PM
Document(s) archivé(s) le : Monday, September 30, 2019 - 11:02:44 PM
Contributor : Frédéric Mallet <>
Submitted on : Thursday, May 2, 2019 - 4:14:41 PM
Last modification on : Tuesday, May 26, 2020 - 6:50:21 PM
Document(s) archivé(s) le : Monday, September 30, 2019 - 11:02:44 PM
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