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A NUMA-aware fine grain parallelization framework for multi-core architecture

Abstract : In this paper, we present some solutions to handle to problems commonly encountered when dealing with fine grain parallelization on multi-core architecture: expressing algorithm using a task grain size suitable for the hardware and minimizing the time penalty due to Non Uniform Memory Accesses. To evaluate the benefit of our work we present some experiments on the fine grain parallelization of an iterative solver for spare linear system with some comparisons with the Intel TBB approach.
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Submitted on : Thursday, September 5, 2013 - 2:28:32 PM
Last modification on : Monday, December 20, 2021 - 4:50:11 PM
Long-term archiving on: : Thursday, April 6, 2017 - 3:34:16 PM


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Corentin Rossignon, Hénon Pascal, Olivier Aumage, Samuel Thibault. A NUMA-aware fine grain parallelization framework for multi-core architecture. PDSEC - 14th IEEE International Workshop on Parallel and Distributed Scientific and Engineering Computing - 2013, May 2013, Boston, United States. ⟨10.1109/IPDPSW.2013.204⟩. ⟨hal-00858350⟩



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