B. Theelen, M. Geilen, T. Basten, J. Voeten, S. Gheorghita et al., A scenario-aware dataflow model for combined long-run average and worst-case performance analysis, MEMOCODE, 2006.

M. Pelcat, S. Aridhi, J. Piat, and J. Nezan, Physical Layer Multi-Core Prototyping: A Dataflow-Based Approach for LTE eNodeB, 2012.
DOI : 10.1007/978-1-4471-4210-2

URL : https://hal.archives-ouvertes.fr/hal-00739957

H. Nikolov, T. Stefanov, and E. Deprettere, Modeling and FPGA Implementation of Applications Using Parameterized Process Networks with Non-Static Parameters, 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'05), 2005.
DOI : 10.1109/FCCM.2005.47

B. Bhattacharya and S. Bhattacharyya, Parameterized dataflow modeling for dsp systems, Signal Processing IEEE Transactions on, 2001.

J. Piat, S. Bhattacharyya, and M. Raulet, Interface-based hierarchy for synchronous data-flow graphs, 2009 IEEE Workshop on Signal Processing Systems, 2009.
DOI : 10.1109/SIPS.2009.5336240

URL : https://hal.archives-ouvertes.fr/hal-00440478

E. Lee and D. Messerschmitt, Synchronous data flow, Proceedings of the IEEE, 1987.
DOI : 10.1109/PROC.1987.13876

G. Bilsen, M. Engels, R. Lauwereins, and J. Peperstraete, Cycle-static dataflow, IEEE Transactions on Signal Processing, vol.44, issue.2, pp.397-408, 1996.
DOI : 10.1109/78.485935

P. Murthy and E. Lee, Multidimensional synchronous dataflow, IEEE Transactions on Signal Processing, vol.50, issue.8, pp.2064-2079, 2002.
DOI : 10.1109/TSP.2002.800830

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.59.4203

A. Bouakaz, J. Talpin, and J. Vitek, Affine Data-Flow Graphs for the Synthesis of Hard Real-Time Applications, 2012 12th International Conference on Application of Concurrency to System Design, p.2012
DOI : 10.1109/ACSD.2012.16

URL : https://hal.archives-ouvertes.fr/hal-00763387

J. P. Hausmans, S. J. Geuns, M. H. Wiggers, and M. J. Bekooij, Compositional temporal analysis model for incremental hard real-time system design, Proceedings of the tenth ACM international conference on Embedded software, EMSOFT '12, 2012.
DOI : 10.1145/2380356.2380390

J. Ostroff, Abstraction and composition of discrete real-time systems, Proc. of CASE, pp.370-380, 1995.

S. Neuendorffer and E. Lee, Hierarchical reconfiguration of dataflow models, Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04., 2004.
DOI : 10.1109/MEMCOD.2004.1459852

H. Kee, C. C. Shen, S. S. Bhattacharyya, I. Wong, Y. Rao et al., Mapping Parameterized Cyclo-static Dataflow Graphs onto Configurable Hardware, Journal of Signal Processing Systems, vol.55, issue.6, 2012.
DOI : 10.1007/s11265-011-0599-5

S. Stuijk, M. Geilen, B. Theelen, and T. Basten, Scenario-aware dataflow: Modeling, analysis and implementation of dynamic applications, 2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, 2011.
DOI : 10.1109/SAMOS.2011.6045491

J. Boutellier, Quasi-static scheduling for fine-grained embedded multiprocessing, 2009.