Automated design of networks of Transport-Triggered Architecture processors using Dynamic Dataflow Programs

Abstract : Modern embedded systems show a clear trend towards the use of Multiprocessor System-on-Chip (MPSoC) architectures in order to handle the performance and power consumption constraints. However, the design and validation of dedicated MPSoCs is an extremely hard and expensive task due to their complexity. Thus, the development of automated design processes is of highest importance to satisfy the time-to-market pressure of embedded systems.
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Signal Processing: Image Communication, Elsevier, 2013, 28 (10), pp.1295 - 1302. <10.1016/j.image.2013.08.013>
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https://hal.archives-ouvertes.fr/hal-00909325
Contributeur : Hervé Yviquel <>
Soumis le : mardi 26 novembre 2013 - 16:48:54
Dernière modification le : jeudi 9 février 2017 - 15:38:15
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Hervé Yviquel, Jani Boutellier, Mickaël Raulet, Emmanuel Casseau. Automated design of networks of Transport-Triggered Architecture processors using Dynamic Dataflow Programs. Signal Processing: Image Communication, Elsevier, 2013, 28 (10), pp.1295 - 1302. <10.1016/j.image.2013.08.013>. <hal-00909325>

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