Exploring system architectures in AADL via Polychrony and SynDEx - Archive ouverte HAL Access content directly
Journal Articles Frontiers of Computer Science Year : 2013

Exploring system architectures in AADL via Polychrony and SynDEx

(1) , (1) , (1) , (1) , (1) , (1) , (2)
1
2

Abstract

Architecture analysis & design language (AADL) has been increasingly adopted in the design of embedded systems, and corresponding scheduling and formal verification have been well studied. However, little work takes code distribution and architecture exploration into account, particularly considering clock constraints, for distributed multi-processor systems. In this paper, we present an overview of our approach to handle these concerns, together with the associated toolchain, AADL-Polychrony-SynDEx. First, in order to avoid semantic ambiguities of AADL, the polychronous/multiclock semantics of AADL, based on a polychronous model of computation, is considered. Clock synthesis is then carried out in Polychrony, which bridges the gap between the polychronous semantics and the synchronous semantics of SynDEx. The same timing semantics is always preserved in order to ensure the correctness of the transformations between different formalisms. Code distribution and corresponding scheduling is carried out on the obtained SynDEx model in the last step, which enables the exploration of architectures originally specified in AADL. Our contribution provides a fast yet efficient architecture exploration approach for the design of distributed real-time and embedded systems. An avionic case study is used here to illustrate our approach.
Not file

Dates and versions

hal-00916445 , version 1 (10-12-2013)

Identifiers

Cite

Huafeng Yu, Yue Ma, Thierry Gautier, Loïc Besnard, Jean-Pierre Talpin, et al.. Exploring system architectures in AADL via Polychrony and SynDEx. Frontiers of Computer Science, 2013, 7 (5), pp.627-649. ⟨10.1007/s11704-013-2307-z⟩. ⟨hal-00916445⟩
267 View
0 Download

Altmetric

Share

Gmail Facebook Twitter LinkedIn More