Presburger Arithmetic in Memory Access Optimization for Data-Parallel Languages

Ralf Karrenberg 1 Marek Kosta 2, 3 Thomas Sturm 2, 4
1 Compiler Design Lab [Saarbrücken]
2 VERIDIS - Modeling and Verification of Distributed Algorithms and Systems
MPII - Max-Planck-Institut für Informatik, Inria Nancy - Grand Est, LORIA - FM - Department of Formal Methods
3 Automation of Logic
MPII - Max-Planck-Institut für Informatik
4 Computational Logic
MPII - Max-Planck-Institut für Informatik
Abstract : Data-parallel languages like OpenCL and CUDA are an important means to exploit the computational power of today's computing devices. We consider the compilation of such languages for CPUs with SIMD instruction sets. To generate efficient code, one wants to statically decide whether or not certain memory operations access consecutive addresses. We formalize the notion of consecutivity and algorithmically reduce the static decision to satisfiability problems in Presburger Arithmetic. We introduce a preprocessing technique on these SMT problems, which makes it feasible to apply an off-the-shelf SMT solver. We show that a prototypical OpenCL CPU driver based on our approach generates more efficient code than any other state-of-the-art driver.
Document type :
Conference papers
Liste complète des métadonnées
https://hal.inria.fr/hal-00931954
Contributor : Stephan Merz <>
Submitted on : Thursday, January 16, 2014 - 10:19:06 AM
Last modification on : Tuesday, February 19, 2019 - 3:40:03 PM

Links full text

istex

Identifiers

Collections

INRIA | UNIV-LORRAINE | LORIA-FM | LORIA

Citation

Ralf Karrenberg, Marek Kosta, Thomas Sturm. Presburger Arithmetic in Memory Access Optimization for Data-Parallel Languages. 9th International Conference Frontiers of Combining Systems (FroCos 2013), Sep 2013, Nancy, France. pp.56-70, ⟨10.1007/978-3-642-40885-4_5⟩. ⟨hal-00931954⟩

Export

BibTeX TEI DC DCterms EndNote

Share

Metrics

Record views

182

Contact


archive-ouverte@inria.fr