A new binary floating-point division algorithm and its software implementation on the ST231 processor

Claude-Pierre Jeannerod 1, 2, * Hervé Knochel 3 Christophe Monat 3 Guillaume Revy 4 Gilles Villard 1, 2, *
* Auteur correspondant
1 LIP - Laboratoire de l'Informatique du Parallélisme
2 ARIC - Arithmetic and Computing
Inria Grenoble - Rhône-Alpes, LIP - Laboratoire de l'Informatique du Parallélisme
3 ST-GRENOBLE - STMicroelectronics [Grenoble]
4 DALI - Digits, Architectures et Logiciels Informatiques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier, UPVD - Université de Perpignan Via Domitia
Abstract : This paper deals with the design and implementation of low latency software for binary floating-point division with correct rounding to nearest. The approach we present here targets a VLIW integer processor of the ST200 family, and is based on fast and accurate programs for evaluating some particular bivariate polynomials. We start by giving approximation and evaluation error conditions that are sufficient to ensure correct rounding. Then we describe the heuristics used to generate such evaluation programs, as well as those used to automatically validate their accuracy. Finally, we propose, for the binary32 format, a complete C implementation of the resulting division algorithm. With the ST200 compiler and compared to previous implementations, the speed-up observed with our approach is by a factor of almost 1.8.
Type de document :
Communication dans un congrès
ARITH: Computer Arithmetic, Jun 2009, Portland, OR, United States. Computer Arithmetic, 2009. ARITH 2009. 19th IEEE Symposium on, pp.95-103, 2009, 〈10.1109/ARITH.2009.19〉
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https://hal.inria.fr/hal-00993090
Contributeur : Claude-Pierre Jeannerod <>
Soumis le : lundi 19 mai 2014 - 16:01:35
Dernière modification le : vendredi 20 juillet 2018 - 11:36:03

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ENS-LYON | INRIA | LIP | UNIV-PERP | DALI | LIRMM | MIPS | UNIV-MONTPELLIER | UNIV-LYON1

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Claude-Pierre Jeannerod, Hervé Knochel, Christophe Monat, Guillaume Revy, Gilles Villard. A new binary floating-point division algorithm and its software implementation on the ST231 processor. ARITH: Computer Arithmetic, Jun 2009, Portland, OR, United States. Computer Arithmetic, 2009. ARITH 2009. 19th IEEE Symposium on, pp.95-103, 2009, 〈10.1109/ARITH.2009.19〉. 〈hal-00993090〉

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