D. Baudisch, J. Brandt, and K. Schneider, Multithreaded code from synchronous programs: Extracting independent threads for OpenMP, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), 2010.
DOI : 10.1109/DATE.2010.5456915

D. Baudisch, J. Brandt, and K. Schneider, Multithreaded code from synchronous programs: Generating software pipelines for OpenMP, Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2010.

A. Benveniste, P. Caspi, S. Edwards, N. Halbwachs, P. L. Guernic et al., The synchronous languages twelve years later, Proceedings of the IEEE, pp.64-83, 2003.

G. Berry, A hardware implementation of pure ESTEREL, Sadhana, vol.12, issue.1, pp.95-130, 1992.
DOI : 10.1007/BF02811340

URL : https://hal.archives-ouvertes.fr/inria-00075083

G. Berry, The foundations of Esterel, Proof, Language and Interaction: Essays in Honour of Robin Milner, 1998.

G. Berry, The constructive semantics of pure Esterel, 1999.

M. Boldt, C. Traulsen, and R. Von-hanxleden, Compilation and Worst-Case Reaction Time Analysis for Multithreaded Esterel Processing, EURASIP Journal on Embedded Systems, vol.03471, issue.3, 2008.
DOI : 10.1155/2007/48979

J. Brandt and K. Schneider, Separate compilation for synchronous programs, Proceedings of th 12th International Workshop on Software and Compilers for Embedded Systems, SCOPES '09, pp.1-10, 2009.
DOI : 10.1145/1543820.1543822

J. A. Brzozowski and C. H. Seger, Asynchronous Circuits, 1995.
DOI : 10.1007/978-1-4612-4210-9

L. P. Carloni, The Role of Back-Pressure in Implementing Latency-Insensitive Systems, Electronic Notes in Theoretical Computer Science, vol.146, issue.2, pp.61-80, 2006.
DOI : 10.1016/j.entcs.2005.05.036

L. P. Carloni, K. L. Mcmillan, and A. Sangiovanni-vincentelli, Latency Insensitive Protocols, Computer Aided Verification (CAV), pp.123-133, 1999.
DOI : 10.1007/3-540-48683-6_13

L. P. Carloni, K. L. Mcmillan, and A. L. Sangiovanni-vincentelli, Theory of latency-insensitive design, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.20, issue.9, pp.1059-1076, 2001.
DOI : 10.1109/43.945302

J. Carmona, J. Cortadella, M. Kishinevsky, and A. Taubin, Elastic Circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.28, issue.10, pp.1437-1455, 2009.
DOI : 10.1109/TCAD.2009.2030436

P. Caspi, A. Girault, and D. Pilaud, Automatic distribution of reactive systems for asynchronous networks of processors, IEEE Transactions on Software Engineering, vol.25, issue.3, pp.416-427, 1999.
DOI : 10.1109/32.798329

URL : https://hal.archives-ouvertes.fr/inria-00073196

M. R. Casu and L. Macchiarulo, A new approach to latency insensitive design, Proceedings of the 41st annual conference on Design automation , DAC '04, pp.576-581, 2004.
DOI : 10.1145/996566.996725

K. M. Chandy and J. Misra, Parallel Program Design, 1989.
DOI : 10.1007/978-1-4613-9668-0_6

J. Cortadella, M. Kishinevsky, and B. Grundmann, SELF: Specification and design of synchronous elastic circuits, International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), 2006.

J. Cortadella, M. Kishinevsky, and B. Grundmann, Synthesis of synchronous elastic architectures, Proceedings of the 43rd annual conference on Design automation , DAC '06, pp.657-662, 2006.
DOI : 10.1145/1146909.1147077

D. L. Dill, The Murphi verification system, Computer Aided Verification (CAV), pp.390-393, 1996.

A. Girault and X. Nicollin, Clock-Driven Automatic Distribution of Lustre Programs, International Conference on Embedded Software (EMSOFT), volume 2855 of LNCS, pp.206-222, 2003.
DOI : 10.1007/978-3-540-45212-6_14

N. Halbwachs, Synchronous programming of reactive systems, Kluwer, 1993.

N. Halbwachs, A Synchronous Language at Work: The Story of Lustre, International Conference on Formal Methods and Models for Co-Design (MEMOCODE), pp.3-11, 2005.
DOI : 10.1002/9781118459898.ch2

URL : https://hal.archives-ouvertes.fr/hal-00190883

H. Järvinen and R. Kurki-suonio, The DisCo language and temporal logic of actions, 1990.

S. Krstic, J. Cortadella, M. Kishinevsky, and J. O. Leary, Synchronous Elastic Networks, 2006 Formal Methods in Computer Aided Design, pp.19-30, 2006.
DOI : 10.1109/FMCAD.2006.32

L. Lamport, The temporal logic of actions, Digital Equipment Cooperation, 1991.
DOI : 10.1145/177492.177726

G. Logothetis and K. Schneider, Exact high level WCET analysis of synchronous programs by symbolic state space exploration, Design, Automation and Test in Europe (DATE), pp.10196-10203, 2003.

F. Rocheteau and N. Halbwachs, Pollux, a Lustre-based hardware design environment, Conference on Algorithms and Parallel VLSI Architectures II, Chateau de Bonas, 1991.

K. Schneider, Embedding imperative synchronous languages in interactive theorem provers, Proceedings Second International Conference on Application of Concurrency to System Design, pp.143-154, 2001.
DOI : 10.1109/CSD.2001.981772

K. Schneider, Proving the Equivalence of Microstep and Macrostep Semantics, Theorem Proving in Higher Order Logics (TPHOL), volume 2410 of LNCS, pp.314-331, 2002.
DOI : 10.1007/3-540-45685-6_21

K. Schneider, The synchronous programming language Quartz, Internal Report, vol.375, 2009.

K. Schneider and J. Brandt, Performing causality analysis by bounded model checking, 2008 8th International Conference on Application of Concurrency to System Design, pp.78-87, 2008.
DOI : 10.1109/ACSD.2008.4574599

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.519.90

K. Schneider, J. Brandt, and T. Schuele, Causality analysis of synchronous programs with delayed actions, Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems , CASES '04, pp.179-189, 2004.
DOI : 10.1145/1023833.1023859

K. Schneider, J. Brandt, and T. Schuele, A Verified Compiler for Synchronous Programs with Local Declarations, Electronic Notes in Theoretical Computer Science, vol.153, issue.4, pp.71-97, 2006.
DOI : 10.1016/j.entcs.2006.02.028

K. Schneider, J. Brandt, T. Schuele, and T. Tuerk, Improving constructiveness in code generators, Synchronous Languages, Applications, and Programming (SLAP), pp.1-19, 2005.

K. Schneider, J. Brandt, T. Schuele, and T. Tuerk, Maximal Causality Analysis, Fifth International Conference on Application of Concurrency to System Design (ACSD'05), pp.106-115, 2005.
DOI : 10.1109/ACSD.2005.24

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.226.2529

T. R. Shiple, Formal Analysis of Synchronous Circuits, 1996.