L. Spracklen and S. Abraham, Chip Multithreading: Opportunities and Challenges, 11th International Symposium on High-Performance Computer Architecture, pp.248-252, 2005.
DOI : 10.1109/HPCA.2005.10

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=

J. Held, J. Bautista, and S. Koehl, From a few cores to many: A tera-scale computing research overview, 2006.

E. Lindholm, J. Nickolls, S. Oberman, and J. Montrym, NVIDIA Tesla: A Unified Graphics and Computing Architecture, IEEE Micro, vol.28, issue.2, pp.39-55, 2008.
DOI : 10.1109/MM.2008.31

M. Monchiero, G. Palermo, C. Silvano, and O. Villa, Efficient Synchronization for Embedded On-Chip Multiprocessors, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.14, issue.10, pp.1049-1062, 2006.
DOI : 10.1109/TVLSI.2006.884147

J. Edmondson, P. Rubinfeld, P. Bannon, B. Benschneider, D. Bernstein et al., Internal organization of the Alpha 21164, a 300-MHz 64-bit quad-issue CMOS RISC microprocessor, Digital Technical Journal, vol.7, issue.1, pp.119-135, 1995.

J. Montanaro, R. Witek, K. Anne, A. Black, E. Cooper et al., A 160-mhz, 32-b, 0.5-w CMOS RISC microprocessor, IEEE Journal of Solid-State Circuits, issue.11, pp.31-1703, 1996.

P. Petrov and A. Orailoglu, Dynamic Tag Reduction for Low-Power Caches in Embedded Systems with Virtual Memory, International Journal of Parallel Programming, vol.35, issue.2, pp.157-177, 2007.
DOI : 10.1007/s10766-006-0030-1

P. Petrov and A. Orailoglu, Virtual page tag reduction for low-power TLBs, Proceedings 21st International Conference on Computer Design, pp.371-374, 2003.
DOI : 10.1109/ICCD.2003.1240921

X. Zhou and P. Petrov, Heterogeneously tagged caches for low-power embedded systems with virtual memory support, ACM Transactions on Design Automation of Electronic Systems, vol.13, issue.2, p.32, 2008.
DOI : 10.1145/1344418.1344428

P. Petrov and A. Orailoglu, Tag Compression for Low Power in Dynamically Customizable Embedded Processors, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.23, issue.7, pp.1031-1047, 2004.
DOI : 10.1109/TCAD.2004.829823

L. Zheng, M. Dong, S. Guo, M. Guo, and L. Li, I-Cache Tag Reduction for Low Power Chip Multiprocessor, 2009 IEEE International Symposium on Parallel and Distributed Processing with Applications, pp.196-202, 2009.
DOI : 10.1109/ISPA.2009.85