MBSPDiscover: An Automatic Benchmark for MultiBSP Performance Analysis

Marcelo Alaniz 1 Sergio Nesmachnow 2 Brice Goglin 3, 4 Santiago Iturriaga 2 Veronica Gil Costa 1 Marcela Printista 1
1 LIDIC
2 CeCal - High Performance Computing
3 RUNTIME - Efficient runtime systems for parallel architectures
Inria Bordeaux - Sud-Ouest, UB - Université de Bordeaux, CNRS - Centre National de la Recherche Scientifique : UMR5800
4 LaBRI - Laboratoire Bordelais de Recherche en Informatique
Abstract : Multi-Bulk Synchronous Parallel (MultiBSP) is a recently proposed parallel programming model for multicore machines that extends the classic BSP model. MultiBSP is very useful to design algorithms and estimate their running time, which are hard to do in High Performance Computing applications. For a correct estimation of the running time, the main parameters of the MultiBSP model for different multicore architectures need to be determined. This article presents a benchmark proposal for measuring the parameters that characterize the communication and synchronization cost for the model. Our approach discovers automatically the hierarchical structure of the multicore architecture by using a specific tool (hwloc) that allows obtaining runtime information about the machine. We describe the design, implementation and the results of benchmarking two multicore machines. Furthermore, we report the validation of the proposed method by using a real MultiBSP implementation of the vector inner product algorithm and comparing the predicted execution time against the real execution time.
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Communication dans un congrès
First HPCLATAM - CLCAR Joint Latin American High Performance Computing Conference, Oct 2014, Valparaiso, Chile. Springer, 485, pp.158-172, 2014, Communications in Computer and Information Science (CCIS)
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Dernière modification le : jeudi 11 janvier 2018 - 06:22:12
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Marcelo Alaniz, Sergio Nesmachnow, Brice Goglin, Santiago Iturriaga, Veronica Gil Costa, et al.. MBSPDiscover: An Automatic Benchmark for MultiBSP Performance Analysis. First HPCLATAM - CLCAR Joint Latin American High Performance Computing Conference, Oct 2014, Valparaiso, Chile. Springer, 485, pp.158-172, 2014, Communications in Computer and Information Science (CCIS). 〈hal-01062528〉

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