G. E. Moore, Moore's law Online http://en.wikipedia.org/wiki/Moore' s law, 1965.

F. J. Pollack, New microarchitecture challenges in the coming generations of CMOS process technologies, Proceedings MICRO 32, 1999.

L. J. Flynn, Intel halts development of 2 new microprocessors, New York Times, 2004.

M. Djemal, F. Pêcheux, D. Potop-butucaru, R. De-simone, F. Wajsbürt et al., Programmable routers for efficient mapping of applications onto NoC-based MPSoCs, Proceedings DASIP, 2012.
URL : https://hal.archives-ouvertes.fr/hal-00787497

T. Carle, M. Djemal, D. Potop-butucaru, R. D. Simone, and Z. Zhang, Off-line mapping of real-time applications onto massively parallel processor arrays, INRIA, 2013.
URL : https://hal.archives-ouvertes.fr/hal-00919411

G. Fohler and K. Ramamritham, Static scheduling of pipelined periodic tasks in distributed real-time systems, Proceedings Ninth Euromicro Workshop on Real Time Systems, 1995.
DOI : 10.1109/EMWRTS.1997.613773

T. Grandpierre and Y. Sorel, From algorithm and architecture specifications to automatic generation of distributed real-time executives: a seamless flow of graphs transformations, First ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2003. MEMOCODE '03. Proceedings., 2003.
DOI : 10.1109/MEMCOD.2003.1210097

T. Carle and D. Potop-butucaru, Throughput Optimization by Software Pipelining of Conditional Reservation tables INRIA, Research report RR-7606, ACM TACO. [Online]. Available, 2011.

S. Amarasinghe, M. I. Gordon, M. Karczmarek, J. Lin, D. Maze et al., Language and Compiler Design for Streaming Applications, International Journal of Parallel Programming, vol.19, issue.2, 2005.
DOI : 10.1007/s10766-005-3590-6

M. B. Taylor, Evaluation of the Raw Microprocessor, ACM SIGARCH Computer Architecture News, vol.32, issue.2, 2004.
DOI : 10.1145/1028176.1006733

I. M. Panades, A. Greiner, and A. Sheibanyrad, A low cost networkon-chip with guaranteed service well suited to the GALS approach, Proceedings NanoNet'06, 2006.

K. Goossens, A. Azevedo, K. Chandrasekar, M. Gomony, S. Goossens et al., Virtual execution platforms for mixed-time-criticality applications : the CompSoC architecture and design flow, Proceedings CRTS, 2012.

I. Bacivarov, W. Haid, K. Huang, and L. Thiele, Methods and tools for mapping process networks onto multi-processor systems-on-chip, Handbook of Signal Processing Systems, 2013.

Z. Shi and A. Burns, Schedulability analysis and task mapping for real-time on-chip communication, Real-Time Systems, vol.6, issue.2, pp.360-385, 2010.
DOI : 10.1007/s11241-010-9108-3

M. Harrand and Y. Durand, Network on chip with quality of service United States patent application publication US, 2011.

C. E. Salloum, M. Elshuber, O. Hftberger, H. Isakovic, and A. Wasicek, The ACROSS MPSoC -- A New Generation of Multi-core Processors Designed for Safety-Critical Embedded Systems, 2012 15th Euromicro Conference on Digital System Design, 2012.
DOI : 10.1109/DSD.2012.126

F. Brandner and M. Schoeberl, Static routing in symmetric real-time network-on-chips, Proceedings of the 20th International Conference on Real-Time and Network Systems, RTNS '12, 2012.
DOI : 10.1145/2392987.2392995

M. Gerdes, F. Kluge, T. Ungerer, C. Rochange, and P. Sainrat, Time analysable synchronisation techniques for parallelised hard real-time applications, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012.
DOI : 10.1109/DATE.2012.6176555

V. Bebelis, P. Fradet, A. Girault, and B. Lavigueur, A framework to schedule parametric dataflow applications on many-core platforms Space optimal solution for data reordering in streaming applications on noc based mpsoc, Proceedings CPC'13, 2013.

J. T. Zhai, M. Bamakhrama, and T. Stefanov, Exploiting just-enough parallelism when mapping streaming applications in hard real-time systems, Proceedings of the 50th Annual Design Automation Conference on, DAC '13, 2013.
DOI : 10.1145/2463209.2488944

P. Aubry, Extended Cyclostatic Dataflow Program Compilation and Execution for an Integrated Manycore Processor, Proceedings ALCHEMY 2013, 2013.
DOI : 10.1016/j.procs.2013.05.330

URL : https://hal.archives-ouvertes.fr/hal-00832504

. Vsi-alliance, VCI: Virtual Component Interface Standard (OCB 2 2.0)

D. Melpignano, L. Benini, E. Flamand, B. Jego, T. Lepley et al., Platform 2012, a many-core computing accelerator for embedded SoCs, Proceedings of the 49th Annual Design Automation Conference on, DAC '12, 2012.
DOI : 10.1145/2228360.2228568

Y. Aydi, M. Baklouti, M. Abid, and J. Dekeyser, A multi-level design methodology of multistage interconnection network for MPSOCs, International Journal of Computer Applications in Technology, vol.42, issue.2/3, pp.191-203, 2011.
DOI : 10.1504/IJCAT.2011.045406

URL : https://hal.archives-ouvertes.fr/inria-00563733

M. R. Kakoee, Reliable and variation-tolerant interconnection network for low power mpsocs, 2012.

I. Puaut and D. Potop-butucaru, Integrated worst-case execution time estimation of multicore applications, Proceedings WCET'13, 2013.
URL : https://hal.archives-ouvertes.fr/hal-00909330

R. Wilhelm, The worst-case execution-time problem???overview of methods and survey of tools, ACM Transactions on Embedded Computing Systems, vol.7, issue.3, 2008.
DOI : 10.1145/1347375.1347389

D. Hardy and I. Puaut, Wcet analysis of multi-level non-inclusive setassociative instruction caches, RTSS, 2008.

R. Wilhelm and J. Reineke, Embedded systems: Many cores — Many problems, 7th IEEE International Symposium on Industrial Embedded Systems (SIES'12), 2012.
DOI : 10.1109/SIES.2012.6356583

C. Pradalier, J. Hermosillo, C. Koike, C. Braillon, P. Bessì et al., The CyCab: a car-like robot navigating autonomously and safely among pedestrians, Robotics and Autonomous Systems, vol.50, issue.1, 2005.
DOI : 10.1016/j.robot.2004.10.002

URL : https://hal.archives-ouvertes.fr/inria-00182049

J. H. Bahn, J. Yang, and N. Bagherzadeh, Parallel FFT algorithms on network-on-chips, Proceedings ITNG 2008, 2008.

P. Caspi, A. Curic, A. Magnan, C. Sofronis, S. Tripakis et al., From Simulink to SCADE/Lustre to TTA: a layered approach for distributed embedded applications, Proceedings LCTES, 2003.

I. Iec, Advanced Video Coding Information technology Coding of audio-visual objects, 2010.

E. Bezati, M. Mattavelli, and M. Raulet, RVC-CAL dataflow implementations of MPEG AVC/H.264 CABAC decoding, 2010 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2010.
DOI : 10.1109/DASIP.2010.5706266

URL : https://hal.archives-ouvertes.fr/hal-00565297

N. Pouillon, Modèle de programmation pour applicationsparalì eles multitâcches et outil de d´ploiementd´ploiement sur architecture multicorè a mémoire partagée, 2011.