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Automatic custom instruction identification for application-specific instruction set processors

Abstract : The application-specific instruction set processors (ASIPs) have received more and more attention in recent years. ASIPs make trade-offs between flexibility and performance by extending the base instruction set of a general-purpose processor with custom functional units (CFUs). Custom instructions, executed on CFUs, make it possible to improve performance and achieve flexibility for extensible processors. The custom instruction synthesis flow involves two essential issues: custom instruction enumeration (subgraph enumeration) and custom instruction selection (subgraph selection). However, both enumerating all possible custom instructions of a given data-flow graph and selecting the most profitable custom instructions from the enumerated custom instructions are computationally difficult problems. In this paper, we propose efficient algorithms for custom instruction enumeration and custom instruction selection. Compared with previously proposed well-known enumeration algorithms, our approach can achieve a significant speedup while generating the identical set of all possible custom instructions or only connected custom instructions. Experimental results also show that a code size reduction rate up to 76% can be achieved for a set of computational intensive programs, and the speed-up achieved is up to 8.2×.
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https://hal.inria.fr/hal-01098451
Contributor : Emmanuel Casseau <>
Submitted on : Wednesday, December 24, 2014 - 6:15:41 PM
Last modification on : Friday, March 6, 2020 - 1:31:14 AM

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Chenglong Xiao, Emmanuel Casseau, Shanshan Wang, Wanjun Liu. Automatic custom instruction identification for application-specific instruction set processors. Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2014, 38 (Issue 8, Part B), pp.13. ⟨10.1016/j.micpro.2014.09.001⟩. ⟨hal-01098451⟩

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