3D Hardware Canaries

Abstract : 3D integration is a promising advanced manufacturing process offering a variety of new hardware security protection opportunities. This paper presents a way of securing 3D ICs using Hamiltonian paths as hardware integrity verification sensors. As 3D integration consists in the stacking of many metal layers, one can consider surrounding a security-sensitive circuit part by a wire cage. After exploring and comparing different cage construction strategies (and reporting preliminary implementation results on silicon), we introduce a ”hardware canary”. The canary is a spatially distributed chain of functions F i positioned at the vertices of a 3D cage surrounding a protected circuit. A correct answer (F n  ∘ … ∘ F 1)(m) to a challenge m attests the canary’s integrity
Document type :
Conference papers
Complete list of metadatas

https://hal.inria.fr/hal-01111533
Contributor : Brigitte Briot <>
Submitted on : Friday, January 30, 2015 - 3:07:06 PM
Last modification on : Thursday, October 17, 2019 - 12:36:15 PM

Links full text

Identifiers

Citation

Sébastien Briais, Stéphane Caron, Jean-Michel Cioranesco, Jean-Luc Danger, Sylvain Guilley, et al.. 3D Hardware Canaries. CHES 2012 - 14th International Workshop Cryptographic Hardware and Embedded Systems, Sep 2012, Leuven, Belgium. pp.1-22, ⟨10.1007/978-3-642-33027-8_1⟩. ⟨hal-01111533⟩

Share

Metrics

Record views

258