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On the Performance of Delegation over Cache-Coherent Shared Memory

Abstract : Delegation is a thread synchronization technique where access to shared data is performed through a dedicated server thread. When a client thread requires shared data access, it makes a request to a server and waits for a response. This paper studies delegation implementation over cache-coherent shared memory, with the goal of optimizing it for high throughput. Whereas client-server communication naturally fits message-passing systems, efficient implementation over cache-coherent shared memory requires careful optimization. We demonstrate optimizations that significantly improve delegation performance on two modern x86 processors (the Intel Xeon Westmere and the AMD Opteron Magny-Cours), enabling us to come up with counter, stack and queue implementations that out-perform the best known alternatives in a large number of cases. Our optimized delegation solution achieves 1.4x (resp. 2x) higher throughput compared to the most efficient state-of-the-art delegation solution on the Intel Xeon (resp. AMD Opteron).
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https://hal.inria.fr/hal-01121957
Contributor : Thomas Ropars <>
Submitted on : Monday, March 2, 2015 - 10:51:32 PM
Last modification on : Monday, October 2, 2017 - 4:06:04 PM
Long-term archiving on: : Tuesday, June 2, 2015 - 10:00:39 AM

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  • HAL Id : hal-01121957, version 1

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Darko Petrović, Thomas Ropars, André Schiper. On the Performance of Delegation over Cache-Coherent Shared Memory. 16th International Conference on Distributed Computing and Networking (ICDCN'15), 2015, Goa, India. ⟨hal-01121957⟩

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