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Protecting against Cryptographic Trojans in FPGAs

Abstract : In contrast to ASICs, hardware Trojans can potentially be injected into FPGA designs post-manufacturing by bit-stream alteration. Hardware Trojans which target cryptographic primitives are particularly interesting for an adversary because a weakened primitive can lead to a complete loss of system security. One problem an attacker has to overcome is the identification of cryptographic primitives in a large bitstream with unknown semantics. As the first contribution, we demonstrate that AES can be algorithmically identified in a look-up table-level design for a variety of implementation styles. Our graph-based approach considers AES implementations which are created using several synthesis and technology mapping options. As the second contribution , we present and discuss the drawbacks of a dynamic obfuscation countermeasure which allows for the configuration of certain crucial parts of a cryptographic primitive after the algorithm has been loaded into the FPGA. As a result, reverse-engineering and modifying a primitive in the bitstream is more challenging.
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Contributor : Christophe Huriaux Connect in order to contact the contributor
Submitted on : Tuesday, April 7, 2015 - 3:13:30 PM
Last modification on : Friday, November 18, 2022 - 9:26:55 AM
Long-term archiving on: : Wednesday, July 8, 2015 - 10:26:45 AM


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Pawel Swierczynski, Marc Fyrbiak, Christof Paar, Christophe Huriaux, Russell Tessier. Protecting against Cryptographic Trojans in FPGAs. FCCM - 23rd IEEE International Symposium on Field-Programmable Custom Computing Machines, May 2015, Vancouver, Canada. ⟨10.1109/FCCM.2015.55⟩. ⟨hal-01140008⟩



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