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Conference Papers Year : 2015

Single Base Modular Multiplication for Efficient Hardware RNS Implementations of ECC

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Abstract

The paper describes a new RNS modular multiplication algorithm for efficient implementations of ECC over FP. Thanks to the proposition of RNS-friendly Mersenne-like primes, the proposed RNS algorithm requires 2 times less moduli than the state-of-art ones, leading to 4 times less precomputations and about 2 times less operations. FPGA implementations of our algorithm are presented, with area reduced up to 46 %, for a time overhead less than 10 %.
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Dates and versions

hal-01199155 , version 1 (15-09-2015)
hal-01199155 , version 2 (18-09-2015)

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Cite

Karim Bigou, Arnaud Tisserand. Single Base Modular Multiplication for Efficient Hardware RNS Implementations of ECC. CHES: 17th International Workshop on Cryptographic Hardware and Embedded Systems, Sep 2015, Saint-Malo, France. pp.123-140, ⟨10.1007/978-3-662-48324-4_7⟩. ⟨hal-01199155v2⟩
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