T. Wiegand, G. Sullivan, G. Bjontegaard, and A. Luthra, Overview of the H.264/AVC video coding standard, IEEE Transactions on Circuits and Systems for Video Technology, pp.560-576, 2003.
DOI : 10.1109/TCSVT.2003.815165

G. Sullivan, J. Ohm, W. Han, and T. Wiegand, Overview of the High Efficiency Video Coding (HEVC) Standard, IEEE Transactions on Circuits and Systems for Video Technology, pp.1649-1668, 2012.
DOI : 10.1109/TCSVT.2012.2221191

A. Jerraya, Long term trends for embedded system design, Euromicro Symposium on Digital System Design, 2004. DSD 2004., pp.20-26, 2004.
DOI : 10.1109/DSD.2004.1333254

URL : https://hal.archives-ouvertes.fr/hal-00102701

F. Yazdanpanah, C. Alvarez-martinez, D. Jimenez-gonzalez, and Y. Etsion, Hybrid Dataflow/von-Neumann Architectures, IEEE Transactions on Parallel and Distributed Systems, vol.25, issue.6, 2014.
DOI : 10.1109/TPDS.2013.125

J. B. Dennis, First version of a data flow procedure language, Programming Symposium, pp.362-376, 1974.
DOI : 10.1007/3-540-06859-7_145

E. A. Lee and T. M. Parks, Dataflow process networks, Proceedings of the IEEE, pp.773-801, 1995.
DOI : 10.1109/5.381846

G. Kahn, The Semantics of a Simple Language for Parallel Programming, Information Processing '74: Proceedings of the IFIP Congress, pp.471-475, 1974.

T. M. Parks, Bounded scheduling of process networks, 1995.

P. Arras, Ordonnancement d'applications dynamiquesàdynamiques`dynamiquesà flux de données pour les MPSoC embarqués hybrides comprenant des unités de calcul programmables et des accélérateurs matériels

D. Melpignano, L. Benini, E. Flamand, B. Jego, T. Lepley et al., Platform 2012, a many-core computing accelerator for embedded SoCs, Proceedings of the 49th Annual Design Automation Conference on, DAC '12, pp.2012-1137
DOI : 10.1145/2228360.2228568

S. A. Neuendorffer, Actor-oriented metaprogramming, 2005.

G. Allen, P. Zucknick, and B. Evans, A Distributed Deadlock Detection and Resolution Algorithm for Process Networks, 2007 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '07, pp.33-36, 2007.
DOI : 10.1109/ICASSP.2007.366165

B. Jiang, E. Deprettere, and B. Kienhuis, Hierarchical run time deadlock detection in process networks, 2008 IEEE Workshop on Signal Processing Systems, pp.239-244, 2008.
DOI : 10.1109/SIPS.2008.4671769

A. Olson and B. Evans, Deadlock Detection For Distributed Process Networks, Proceedings. (ICASSP '05). IEEE International Conference on Acoustics, Speech, and Signal Processing, 2005., pp.73-76, 2005.
DOI : 10.1109/ICASSP.2005.1416243

E. A. Lee and D. G. Messerschmitt, Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing, IEEE Transactions on Computers, vol.36, issue.1, pp.24-35, 1987.
DOI : 10.1109/TC.1987.5009446

V. Bebelis, P. Fradet, A. Girault, and B. Lavigueur, BPDF: A statically analyzable dataflow model with integer and boolean parameters, 2013 Proceedings of the International Conference on Embedded Software (EMSOFT), pp.1-310, 2013.
DOI : 10.1109/EMSOFT.2013.6658581

URL : https://hal.archives-ouvertes.fr/hal-00923672

M. Mattavelli, I. Amer, and M. Raulet, The Reconfigurable Video Coding Standard [Standards in a Nutshell, IEEE Signal Processing Magazine, vol.27, issue.3, pp.159-167, 2010.
DOI : 10.1109/MSP.2010.936032

URL : https://hal.archives-ouvertes.fr/hal-00488661

H. Yviquel, A. Lorence, K. Jerbi, G. Cocherel, A. Sanchez et al., Orcc, Proceedings of the 21st ACM international conference on Multimedia, MM '13, pp.863-866, 2013.
DOI : 10.1145/2502081.2502231

URL : https://hal.archives-ouvertes.fr/hal-01059858

H. Yviquel, E. Casseau, M. Wipliez, and M. Raulet, Efficient multicore scheduling of dataflow process networks, 2011 IEEE Workshop on Signal Processing Systems (SiPS), pp.198-203, 2011.
DOI : 10.1109/SiPS.2011.6088974

URL : https://hal.archives-ouvertes.fr/hal-00687750

H. Yviquel, E. Casseau, M. Raulet, P. Jaaskelainen, and J. Takala, Towards run-time actor mapping of dynamic dataflow programs onto multi-core platforms, 2013 8th International Symposium on Image and Signal Processing and Analysis (ISPA), pp.732-737, 2013.
DOI : 10.1109/ISPA.2013.6703834

URL : https://hal.archives-ouvertes.fr/hal-00909408

H. Yviquel, A. Sanchez, P. Jääskeläinen, J. Takala, M. Raulet et al., Embedded Multi-Core Systems Dedicated to Dynamic Dataflow Programs, Journal of Signal Processing Systems, vol.28, issue.10, pp.1-16, 2014.
DOI : 10.1007/s11265-014-0953-5

URL : https://hal.archives-ouvertes.fr/hal-01078142

T. Basten and J. Hoogerbrugge, Efficient execution of process networks, Proc. of Communicating Process Architectures, pp.1-14, 2001.

W. Haid, L. Schor, K. Huang, I. Bacivarov, and L. Thiele, Efficient execution of Kahn process networks on multi-processor systems using protothreads and windowed FIFOs, 2009 IEEE/ACM/IFIP 7th Workshop on Embedded Systems for Real-Time Multimedia, pp.35-44, 2009.
DOI : 10.1109/ESTMED.2009.5336828

C. Ptolemaeus and E. , System Design, Modeling, and Simulation using Ptolemy II, 2014.

A. Goderis, C. Brooks, I. Altintas, E. A. Lee, and C. Goble, Heterogeneous composition of models of computation, Future Generation Computer Systems, vol.25, issue.5, pp.552-560, 2009.
DOI : 10.1016/j.future.2008.06.014

E. A. Lee, Disciplined Heterogeneous Modeling, Proceedings of the 13th International Conference on Model Driven Engineering Languages and Systems: Part II, ser. MODELS'10, pp.273-287, 2010.
DOI : 10.1007/3-540-45874-3_2