G. Baudart, A. Benveniste, A. Bouillard, and P. Caspi, A unifying view of Loosely Time-Triggered Architectures
URL : https://hal.archives-ouvertes.fr/hal-00955496

A. Benveniste, A. Bouillard, and P. Caspi, A unifying view of loosely time-triggered architectures, Proceedings of the tenth ACM international conference on Embedded software, EMSOFT '10, pp.189-198, 2010.
DOI : 10.1145/1879021.1879047

URL : https://hal.archives-ouvertes.fr/hal-00955496

A. Benveniste, P. Caspi, M. D. Natale, C. Pinello, A. Sangiovanni-vincentelli et al., Loosely Time-triggered Architectures based on Communicationby-sampling, EMSOFT'07, pp.231-239, 2007.

A. Benveniste, P. Caspi, S. A. Edwards, N. Halbwachs, P. L. Guernic et al., The synchronous languages 12 years later, Proc. IEEE, pp.64-83, 2003.
DOI : 10.1109/JPROC.2002.805826

A. Benveniste, P. Caspi, P. Le-guernic, H. Marchand, J. Talpin et al., A Protocol for Loosely Time-Triggered Architectures, EMSOFT'02, pp.252-265, 2002.
DOI : 10.1007/3-540-45828-X_19

URL : https://hal.archives-ouvertes.fr/inria-00526261

T. Bourke and M. Pouzet, Z??lus, Proceedings of the 16th international conference on Hybrid systems: computation and control, HSCC '13, pp.113-118
DOI : 10.1145/2461328.2461348

L. P. Carloni, The Role of Back-Pressure in Implementing Latency-Insensitive Systems, Electronic Notes in Theoretical Computer Science, vol.146, issue.2, pp.61-80, 2006.
DOI : 10.1016/j.entcs.2005.05.036

L. P. Carloni, K. L. Mcmillan, and A. L. Sangiovanni-vincentelli, Theory of latency-insensitive design, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.20, issue.9, pp.1059-1076, 2001.
DOI : 10.1109/43.945302

L. P. Carloni and A. L. Sangiovanni-vincentelli, Coping with latency in SOC design, IEEE Micro, vol.22, issue.5, pp.24-35, 2002.
DOI : 10.1109/MM.2002.1044297

P. Caspi, About the Design of Distributed Control Systems: The Quasi-Synchronous Approach, 2000.
DOI : 10.1007/3-540-45416-0_21

P. Caspi and A. Benveniste, Time-robust discrete control over networked Loosely Time-Triggered Architectures, 2008 47th IEEE Conference on Decision and Control, pp.3595-3600, 2008.
DOI : 10.1109/CDC.2008.4738619

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.192.4133

P. Caspi, A. Girault, and D. Pilaud, Distributing reactive systems, PDCS '94, pp.101-107, 1994.

J. C. Corbett, J. Dean, M. Epstein, A. Fikes, C. Frost et al., Spanner, OSDI'12, pp.261-264, 2012.
DOI : 10.1145/2518037.2491245

J. Cortadella and M. Kishinevsky, Synchronous elastic circuits with early evaluation and token counterflow, DAC'07, pp.416-419, 2007.

J. Cortadella, A. Kondratyev, L. Lavagno, and C. P. Sotiriou, Desynchronization: Synthesis of Asynchronous Circuits From Synchronous Specifications, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.25, issue.10, pp.1904-1921, 2006.
DOI : 10.1109/TCAD.2005.860958

E. Technologies, Scade suite. http://www. esterel-technologies.com/products/scade-suite

N. Halbwachs and S. Baghdadi, Synchronous Modelling of Asynchronous Systems, EMSOFT'02, pp.240-251, 2002.
DOI : 10.1007/3-540-45828-X_18

N. Halbwachs, P. Caspi, P. Raymond, and D. Pilaud, The synchronous dataflow programming language Lustre, Proc. IEEE, pp.1305-1320, 1991.

N. Halbwachs and L. Mandel, Simulation and verification of aysnchronous systems by means of a synchronous model, ACSD'06, pp.3-14, 2006.

G. Kahn, The semantics of a simple language for parallel programming, IFIP'74, pp.471-475, 1974.

H. Kopetz, Real-time systems: design principles for distributed embedded applications, 2011.

K. Lee and J. C. Eidson, IEEE 1588-standard for a precision clock synchronization protocol for networked measurement and control systems, SIcon'02, pp.98-105, 2002.

N. A. Lynch, Distributed Algorithms, 1996.

F. Maraninchi and Y. Rémond, Argos: an automaton-based synchronous language, Computer Languages, vol.27, issue.1-3, pp.61-92, 2001.
DOI : 10.1016/S0096-0551(01)00016-9

URL : https://hal.archives-ouvertes.fr/hal-00273055

D. L. Mills, Computer Network Time Synchronization: The Network Time Protocol, 2006.
DOI : 10.1201/9781420006155

S. Tripakis, C. Pinello, A. Benveniste, A. Sangiovanni-vincent, P. Caspi et al., Implementing Synchronous Models on Loosely Time Triggered Architectures, IEEE Transactions on Computers, vol.57, issue.10, pp.1300-1314, 2008.
DOI : 10.1109/TC.2008.81