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Thermal Aware Design Method for VCSEL-Based On-Chip Optical Interconnect

Abstract : Optical Network-on-Chip (ONoC) is an emerging technology considered as one of the key solutions for future generation on-chip interconnects. However, silicon photonic devices in ONoC are highly sensitive to temperature variation, which leads to a lower efficiency of Vertical-Cavity Surface-Emitting Lasers (VCSELs), a resonant wavelength shift of Microring Resonators (MR), and results in a lower Signal to Noise Ratio (SNR). In this paper, we propose a methodology enabling thermal-aware design for optical interconnects relying on CMOS-compatible VCSEL. Thermal simulations allow designing ONoC interfaces with low gradient temperature and analytical models allow evaluating the SNR.
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https://hal.inria.fr/hal-01243263
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Submitted on : Wednesday, December 23, 2015 - 12:38:02 PM
Last modification on : Wednesday, June 2, 2021 - 11:02:09 AM
Long-term archiving on: : Thursday, March 24, 2016 - 10:22:27 AM

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Hui Li, Alain Fourmigue, Sébastien Le Beux, Xavier Letartre, Ian O 'Connor, et al.. Thermal Aware Design Method for VCSEL-Based On-Chip Optical Interconnect. IEEE International Conference on Design Automation and Test in Europe (DATE 2015), Mar 2015, Grenoble, France. ⟨10.7873/DATE.2015.0479⟩. ⟨hal-01243263⟩

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