Arrangement to measure and use latency between an input interface and an output interface of a processing device

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https://hal.inria.fr/hal-01252627
Contributor : Géry Casiez <>
Submitted on : Thursday, January 7, 2016 - 7:06:35 PM
Last modification on : Tuesday, April 2, 2019 - 2:29:59 AM

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  • HAL Id : hal-01252627, version 1

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Stéphane Conversy, Géry Casiez, Matthieu Falce, Stéphane Huot, Nicolas Roussel. Arrangement to measure and use latency between an input interface and an output interface of a processing device. France, Patent n° : European application number 15306665.9. 2015. ⟨hal-01252627⟩

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