T. Chen and J. Baer, Effective hardware-based data prefetching for high-performance processors, IEEE Transactions on Computers, vol.44, issue.5, 1995.

Y. Chou, Low-Cost Epoch-Based Correlation Prefetching for Commercial Applications, 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2007), 2007.
DOI : 10.1109/MICRO.2007.39

G. Z. Chrysos and J. S. Emer, Memory dependence prediction using store sets, ISCA, 1998.
DOI : 10.1145/279361.279378
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.10.6285

F. Dahlgren, M. Dubois, and P. Stenström, Fixed and Adaptive Sequential Prefetching in Shared Memory Multiprocessors, 1993 International Conference on Parallel Processing, ICPP'93 Vol1, 1993.
DOI : 10.1109/ICPP.1993.92

J. W. Fu, J. H. Patel, and B. L. Janssens, Stride directed prefetching in scalar processors, MICRO, 1992.
DOI : 10.1145/144965.145006

E. Hagersten, Toward scalable cache only memory architectures, Royal Institute of Technology (KTH), 1992.

I. Hur and C. Lin, Memory Prefetching Using Adaptive Stream Detection, 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06), 2006.
DOI : 10.1109/MICRO.2006.32

. Intel, Intel 64 and IA-32 architectures optimization reference manual, 2014.

Y. Ishii, M. Inaba, and K. Hiraki, Access map pattern matching for high performance data cache prefetch, Journal of Instruction-Level Parallelism, vol.13, 2011.

A. Jain and C. Lin, Linearizing irregular memory accesses for improved correlated prefetching, Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-46, 2013.
DOI : 10.1145/2540708.2540730
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.466.5455

A. Jaleel, K. B. Theobald, S. C. Steely-jr, and J. Emer, High performance cache replacement using re-reference interval prediction (RRIP), ISCA, 2010.

D. Joseph and D. Grunwald, Prefetching using Markov predictors, ISCA, 1997.
DOI : 10.1145/384286.264207
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.637.7652

N. Jouppi, Improving direct-mapped cache performance by the addition of a small fully associative cache and prefetch buffers, ISCA, 1990.

G. B. Kandiraju, A. Sivasubramaniam, T. Kim, D. Zhao, and A. V. Veidenbaum, Going the distance for TLB prefetching, ISCA Computing Frontiers, 2002.
DOI : 10.1145/545214.545237

D. Kroft, Lockup-free instruction fetch/prefetch cache organization, 25 years of the international symposia on Computer architecture (selected papers) , ISCA '98, 1981.
DOI : 10.1145/285930.285979
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.301.1286

W. Lin, S. K. Reinhardt, and D. Burger, Reducing DRAM latencies with an integrated memory hierarchy design, HPCA, 2001.

C. Luk, R. Cohn, R. Muth, H. Patil, A. Klauser et al., Pin : building customized program analysis tools with dynamic instrumentation, PLDI, 2005.

P. Michaud, The 3P and 4P cache replacement policies, 1st JILP Workshop on Computer Architecture Competitions (JWAC-1): Cache Replacement Championship, 2010.
URL : https://hal.archives-ouvertes.fr/inria-00492968

K. J. Nesbit, A. S. Dhodapkar, and J. E. Smith, AC/DC: an adaptive data cache prefetcher, Proceedings. 13th International Conference on Parallel Architecture and Compilation Techniques, 2004. PACT 2004., 2004.
DOI : 10.1109/PACT.2004.1342548

K. J. Nesbit and J. E. Smith, Data cache prefetching using a global history buffer, HPCA, 2004.
DOI : 10.1109/mm.2005.6

S. Palacharla and R. Kessler, Evaluating stream buffers as a secondary cache replacement, ISCA, 1994.

D. , G. Pérez, G. Mouchard, and O. Temam, MicroLib: a case for quantitative comparison of micro-architecture mechanisms, MICRO, 2004.

S. H. Pugsley, Z. Chishti, C. Wilkerson, P. F. Chuang, R. L. Scott et al., Sandbox Prefetching: Safe run-time evaluation of aggressive prefetchers, 2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA), 2014.
DOI : 10.1109/HPCA.2014.6835971

M. K. Qureshi, A. Jaleel, Y. N. Patt, S. C. Steely-jr, and J. Emer, Adaptive insertion policies for high-performance caching, ISCA, 2007.
DOI : 10.1145/1250662.1250709
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.227.4420

S. Rixner, W. J. Dally, U. J. Kapasi, P. Mattson, and J. D. Owens, Memory access scheduling, ISCA, 2000.
DOI : 10.1145/342001.339668
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.25.9673

V. Seshadri, S. Yekdar, H. Xin, O. Mutlu, P. B. Gibbons et al., Mitigating Prefetcher-Caused Pollution Using Informed Caching Policies for Prefetched Blocks, ACM Transactions on Architecture and Code Optimization, vol.11, issue.4, 2015.
DOI : 10.1145/2677956

A. Seznec and P. Michaud, A case for (partially) tagged geometric history length branch prediction, Journal of Instruction Level Parallelism, 2006.

I. Sklenar, Prefetch unit for vector operations on scalar computers, Computer Architecture News, vol.20, issue.4, 1992.

A. J. Smith, Sequentiality and prefetching in database systems, ACM Transactions on Database Systems, vol.3, issue.3, pp.223-247, 1978.
DOI : 10.1145/320263.320276

A. J. Smith, Cache Memories, ACM Computing Surveys, vol.14, issue.3, 1982.
DOI : 10.1145/356887.356892

K. So and R. N. Rechtschaffen, Cache operations by MRU change, IEEE Transactions on Computers, vol.37, issue.6, pp.700-709, 1988.
DOI : 10.1109/12.2208

S. Somogyi, T. F. Wenisch, A. Ailamaki, and B. Falsafi, Spatio-temporal memory streaming, ISCA, 2009.
DOI : 10.1145/1555815.1555766
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.155.190

S. Somogyi, T. F. Wenisch, A. Ailamaki, B. Falsafi, and A. Moshovos, Spatial memory streaming, ISCA, 2006.
DOI : 10.1145/1150019.1136508
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.373.1295

S. Srinath, O. Mutlu, H. Kim, and Y. N. Patt, Feedback Directed Prefetching: Improving the Performance and Bandwidth-Efficiency of Hardware Prefetchers, 2007 IEEE 13th International Symposium on High Performance Computer Architecture, 2007.
DOI : 10.1109/HPCA.2007.346185

Z. Wang, D. Burger, K. S. Mckinley, S. K. Reinhardt, and C. C. Weems, Guided region prefetching: a cooperative hardware/software approach, ISCA, 2003.

C. Wu, A. Jaleel, M. Martonosi, S. C. Jr, and J. Emer, PACMan, Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO-44 '11, 2011.
DOI : 10.1145/2155620.2155672