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Time-Efficient Read/Write Register in Crash-prone Asynchronous Message-Passing Systems

Achour Mostefaoui 1 Michel Raynal 2, *
* Corresponding author
2 ASAP - As Scalable As Possible: foundations of large scale dynamic distributed systems
IRISA-D1 - SYSTÈMES LARGE ÉCHELLE, Inria Rennes – Bretagne Atlantique
Abstract : The atomic register is certainly the most basic object of computing science. Its implementation on top of an n-process asynchronous message-passing system has received a lot of attention. It has been shown that t < n/2 (where t is the maximal number of processes that may crash) is a necessary and sufficient requirement to build an atomic register on top of a crash-prone asynchronous message-passing system. Considering such a context, this paper visits the notion of a fast implementation of an atomic register, and presents a new time-efficient asynchronous algorithm. Its time-efficiency is measured according to two different underlying synchrony assumptions. Whatever this assumption, a write operation always costs a round-trip delay, while a read operation costs always a round-trip delay in favorable circumstances (intuitively, when it is not concurrent with a write). When designing this algorithm, the design spirit was to be as close as possible to the one of the famous ABD algorithm (proposed by Attiya, Bar-Noy, and Dolev).
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https://hal.inria.fr/hal-01256067
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Submitted on : Friday, January 15, 2016 - 1:51:10 PM
Last modification on : Thursday, January 7, 2021 - 4:23:03 PM
Long-term archiving on: : Saturday, April 16, 2016 - 10:12:58 AM

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  • HAL Id : hal-01256067, version 1
  • ARXIV : 1601.04820

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Achour Mostefaoui, Michel Raynal. Time-Efficient Read/Write Register in Crash-prone Asynchronous Message-Passing Systems. [Research Report] IRISA. 2016, pp.14. ⟨hal-01256067⟩

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