T. Murata, Petri nets: Properties, analysis and applications, Proceedings of the IEEE, vol.77, issue.4, pp.541-580, 1989.
DOI : 10.1109/5.24143

A. Karatkevich, Dynamic analysis of Petri net-based discrete systems, 2007.

A. Bukowiec and P. Mróz, An FPGA synthesis of the distributed control systems designed with Petri nets, 2012 IEEE 3rd International Conference on Networked Embedded Systems for Every Application (NESEA), 2012.
DOI : 10.1109/NESEA.2012.6474021

A. Karatkevich and R. Wi?niewski, Computation of Petri nets covering by SM-components based on the graph theory, Electrical Review, pp.141-144, 2012.

R. L. Rudell, Logic Synthesis for VLSI Design, 1989.

R. Wi?niewski, M. Wi?niewska, and M. Adamski, A polynomial algorithm to compute the concurrency hypergraph in Petri nets, Measurement Automation and Monitoring, vol.58, issue.7, pp.650-652, 2012.

M. Wi?niewska, Application of Hypergraphs in Decomposition of Discrete Systems, LNCCS, vol.23, 2012.

L. Stefanowicz, M. Adamski, and R. Wi?niewski, Application of an Exact Transversal Hypergraph in Selection of SM-Components, IFIP Advanced in Information and Communication Technology, 2013.
DOI : 10.1007/978-3-642-37291-9_27
URL : https://hal.archives-ouvertes.fr/hal-01348761

D. Knuth, Dancing links, Millennial Perspectives in Computer Science, 2000.

T. Eiter, Exact Transversal Hypergraphs and Application to Boolean ??-Functions, Journal of Symbolic Computation, vol.17, issue.3, pp.215-225, 1994.
DOI : 10.1006/jsco.1994.1013

A. Kovalyov, Concurrency Relations and the Safety Problem for Petri Nets. Application and Theory of Petri Nets, 1992.

C. Berge, Hypergraphs: Combinatorics of Finite Sets, 1989.

A. Bukowiec and M. Doligalski, Petri Net Dynamic Partial Reconfiguration in FPGA, Computer Aided Systems Theory ? EUROCAST, pp.436-443, 2013.
DOI : 10.1007/978-3-642-53856-8_55

A. Karatkevich, SM-Components problem reductions of Petri nets, Telecommunication Review, 2008.

A. Barkalov, L. Titarenko, J. Bieganowski, and A. Miroshkin, 8 Synthesis of Compositional Microprogram Control Unit with Dedicated Area of Inputs, In: Lecture Notes in Electrical Engineering. Number, vol.79, pp.193-214, 2011.
DOI : 10.1007/978-3-642-17545-9_8

A. Barkalov, M. Ko?opie?czyk, and L. Titarenko, Design of CMCU with EOLC and Encoding of Collections of Microoperations, 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems, pp.262-265, 2007.
DOI : 10.1109/MIXDES.2007.4286163

M. Blanchard, Comprendre, maitriser et appliquer le Grafcet, 1979.

G. Demicheli, Synthesis and Optimization of Digital Circuits, 1994.

A. Bukowiec and A. Barkalov, Automata Implementation in FPGA devices with Multiple Encoding States, Electrical Review, pp.185-188, 2009.